事件管理器功能框图(EVA) PIE EV Control Registers Logic CLKINA/ TDIRA ADC Start GP Timer 1 Compare Output Logic T1PWM T1CMP GP Timer 1 Compare Unit 1 PWM Circuits Output Logic Compare Unit 2 PWM Circuits Output Logic PWM3 s PWM4 Compare Unit 3 * PWM Circuits Output Logic + PWM5 PWM6 GP Timer 2 Compare Output L T2PWM T2CMP GP Timer 2 CLK OEP MUX DIR Circuit CAP1/QEP1 Capture Units CAP2/QEP2 CAP3/QEPI1事件管理器功能框图 (EVA) PWM Circuits PWM Circuits PWM Circuits Output Logic Output Logic Output Logic GP Timer 1 Compare GP Timer 1 GP Timer 2 Compare GP Timer 2 Compare Unit 1 Compare Unit 2 Compare Unit 3 Capture Units MUX Output Logic Output Logic EV Control Registers / Logic Reset PIE / TCLKINA / TDIRA 2 ADC Start Data Bus QEP Circuit CLK DIR • • T1PWM_T1CMP T2PWM_T2CMP PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 CAP1/QEP1 CAP2/QEP2 • CAP3/QEPI1