正在加载图片...
Microprocessor-DRAM性能差异 利用 caches来缓解徼处理器与存储器性能上的差异 Microprocessor-DRAM性能差异 time of a full cache miss in instructions executed 1st Alpha 340 ns/5.0 ns 68 clks or 136 instructions 2nd alpha: 266 ns/3.3 ns =80 clks x 4 or 320 instructions 3rd alpha: 180 ns/1.7 ns =108 clks x6 or 648 instructions 计算机体系结构 Chapter5.5计算机体系结构 Chapter5.5 Microprocessor-DRAM性能差异 ▪ 利用caches来缓解微处理器与存储器性能上的差异 ▪ Microprocessor-DRAM 性能差异 • time of a full cache miss in instructions executed 1st Alpha : 340 ns/5.0 ns = 68 clks x 2 or 136 instructions 2nd Alpha : 266 ns/3.3 ns = 80 clks x 4 or 320 instructions 3rd Alpha : 180 ns/1.7 ns =108 clks x 6 or 648 instructions
<<向上翻页向下翻页>>
©2008-现在 cucdc.com 高等教育资讯网 版权所有