The sample-and-hold phase detector is widely used where optimum noise performance is required. This circuit operates by using one of the phase detector inputs to sample the voltage on the other input. This latter input is usually converted to a triangle wave to give a linear phase detector characteristic. Once the input is sampled, its voltage is held using a capacitor. The good noise performance is achieved since most of the time phase detector depends on the type of waveform shaping used and can range from #90 to #180 degre 3.I One of the simplest types of phase detectors to implement uses an exclusive OR gate to digitally multiply the two signals together. The output must then be low-pass filtered to extract only the dc component. The main drawback to this circuit is the large component that exists in the output at twice the input frequency This requires a large amount of low-pass filtering and may restrict the Pll design. The phase range of this type of circuit is #90 degrees. One of the main drawbacks of all the above types of phase detectors is that they only provide an output that proportional to phase and not to a frequency difference in the input signals. For many applications the PlL input signals are initially not on the same frequency. Several techniques have been used in the past to resolve this such as sweeping the VCO or using separate circuitry to first acquire the input frequency. The sequential (sometimes called phase/frequency) phase detector has become the most commonly used solution due to its wide availability in integrated form. This type of phase detector produces pulses with the width of the pulses indicating the phase difference of the inputs. It also has the characteristic of providing the correct output to teer the vCo to the correct frequency. The noise characteristic of this type of phase detector is also quite good since either no or very narrow pulses are produced when the inputs are in phase with each other. The phase range of this type of circuit is +360 degrees Digital dividers are widely available and may either have progra or fixed division ratios depending on the application For optimum noise performance a synchronous type of divider should be used. when a programmable divider is required to operate at a high frequency(>50 MHz), a dual modulus circuit is normally used. This circuit uses a technique called pulse swallowing to extend the range of normal programmable divider integrated circuits by using a dual modulus prescaler (usually ECL). The dual modulus prescaler is a high frequency divider that can be programmed to divide by only two sequential values. A second programmable divider section is then used to control the prescaler. Further details of this type of divider are available from component manufacturers' data sheets as well as in the references. The voltage-controlled oscillator is typically the most critical circuit in determining the overall noise per formance of a pll. For this reason it is ofte mented using discrete components, especially at the higher frequencies. Some digital integrated circuits exist for lower-frequency VCOs, and microwave integrated circuit VCOs are now available for use to several gigahertz. The major design parameters for a vCO include the operating frequency, tuning range, tuning linearity, and phase noise performance. Further information on the design of vCOs is contained in the reference Loop filters used in PLLs may be either active or passive depending on ific application. Active filters are normally used in more critical applications when superior control of loop parameters and reference frequency suppression is required. The loop filter is typically followed by a filter to remove any residual reference frequency component from the phase detector. This low-pass filter will affect the calculated loop response and will typically appear to reduce the loop damping factor as its corner frequency is brought closer to the loop natural frequency. To avoid this degradation the corner frequency of this filter should be approxi mately one order of magnitude greater than the loop natural frequency. In some cases a notch filter may be used to reduce the reference frequency when it is close to the reference frequency. 76.6 Applications Phase-locked loops are used in many applications including frequency synthesis, modulation, demodulation and clock recovery. A frequency synthesizer is a Pll that uses a programmable divider in the feedback. selecting various values of division ratio, several output frequencies may be obtained that are integer multiples of the reference frequency(Fref). Frequency synthesizers are widely used in radio communications equipment is an integer multiple of the reference frequency, this will determine the channel spacing obtained. The mg to obtain a stable frequency source that may be tuned to a desired radio channel. Since the output frequen e 2000 by CRC Press LLC© 2000 by CRC Press LLC The sample-and-hold phase detector is widely used where optimum noise performance is required. This circuit operates by using one of the phase detector inputs to sample the voltage on the other input. This latter input is usually converted to a triangle wave to give a linear phase detector characteristic. Once the input is sampled, its voltage is held using a capacitor. The good noise performance is achieved since most of the time the phase detector output is simply a stored charge on this capacitor. The phase range of the sample-and-hold phase detector depends on the type of waveform shaping used and can range from ±90 to ±180 degrees. One of the simplest types of phase detectors to implement uses an exclusive OR gate to digitally multiply the two signals together. The output must then be low-pass filtered to extract only the dc component. The main drawback to this circuit is the large component that exists in the output at twice the input frequency. This requires a large amount of low-pass filtering and may restrict the PLL design. The phase range of this type of circuit is ±90 degrees. One of the main drawbacks of all the above types of phase detectors is that they only provide an output that is proportional to phase and not to a frequency difference in the input signals. For many applications the PLL input signals are initially not on the same frequency. Several techniques have been used in the past to resolve this such as sweeping the VCO or using separate circuitry to first acquire the input frequency. The sequential (sometimes called phase/frequency) phase detector has become the most commonly used solution due to its wide availability in integrated form. This type of phase detector produces pulses with the width of the pulses indicating the phase difference of the inputs. It also has the characteristic of providing the correct output to steer the VCO to the correct frequency. The noise characteristic of this type of phase detector is also quite good since either no or very narrow pulses are produced when the inputs are in phase with each other. The phase range of this type of circuit is ±360 degrees. Digital dividers are widely available and may either have programmable or fixed division ratios depending on the application. For optimum noise performance a synchronous type of divider should be used. When a programmable divider is required to operate at a high frequency (>50 MHz), a dual modulus circuit is normally used. This circuit uses a technique called pulse swallowing to extend the range of normal programmable divider integrated circuits by using a dual modulus prescaler (usually ECL). The dual modulus prescaler is a high￾frequency divider that can be programmed to divide by only two sequential values. A second programmable divider section is then used to control the prescaler. Further details of this type of divider are available from component manufacturers’ data sheets as well as in the references. The voltage-controlled oscillator is typically the most critical circuit in determining the overall noise per￾formance of a PLL. For this reason it is often implemented using discrete components, especially at the higher frequencies. Some digital integrated circuits exist for lower-frequency VCOs, and microwave integrated circuit VCOs are now available for use to several gigahertz. The major design parameters for a VCO include the operating frequency, tuning range, tuning linearity, and phase noise performance. Further information on the design of VCOs is contained in the references. Loop filters used in PLLs may be either active or passive depending on the specific application. Active filters are normally used in more critical applications when superior control of loop parameters and reference frequency suppression is required. The loop filter is typically followed by a low-pass filter to remove any residual reference frequency component from the phase detector. This low-pass filter will affect the calculated loop response and will typically appear to reduce the loop damping factor as its corner frequency is brought closer to the loop natural frequency. To avoid this degradation the corner frequency of this filter should be approxi￾mately one order of magnitude greater than the loop natural frequency. In some cases a notch filter may be used to reduce the reference frequency when it is close to the reference frequency. 76.6 Applications Phase-locked loops are used in many applications including frequency synthesis, modulation, demodulation, and clock recovery. A frequency synthesizer is a PLL that uses a programmable divider in the feedback. By selecting various values of division ratio, several output frequencies may be obtained that are integer multiples of the reference frequency (Fref). Frequency synthesizers are widely used in radio communications equipment to obtain a stable frequency source that may be tuned to a desired radio channel. Since the output frequency is an integer multiple of the reference frequency, this will determine the channel spacing obtained. The main