嵌入固定延时参数 例 ENTITY and2 gate IS PORT (inO, inl: IN bit outl: oUt bit) END and2 gate ARCHITECTURE fixed delay Of and2 gate IS CONSTANT Typical delay: time: =8 ns: BEGIN outl < inO and inl aFTER Typical delay END fixed delay一、嵌入固定延时参数 例： ENTITY and2_gate IS PORT (in0, in1 : IN bit; out1 : OUT bit); END and2_gate; ARCHITECTURE fixed_delay OF and2_gate IS CONSTANT Typical_delay : time := 8 ns; BEGIN out1 <= in0 AND in1 AFTER Typical_delay; END fixed_delay;