5.2.2 并行信号赋值语句（续2） 2.条件信号赋值语句 例5.23选1多路选择器的行为描述。 LIBRARY IEEE; USE IEEE.STD LOGIC1164.ALL; ENTITY mux31 IS PORT (a,b,c IN STD_LOGIC; en1,en2 IN STD LOGIC; OUT STD_LOGIC); END mux31; ARCHITECTURE behavioral OF mux31 IS BEGIN Z<=a WHEN en2 ='1'ELSE b WHEN en1='1'ELSE Ci END behavioral; 5.2.2 并行信号赋值语句（续2） 2. 条件信号赋值语句 例5.2 3选1多路选择器的行为描述。 LIBRARY IEEE; USE IEEE.STD_LOGIC 1164.ALL; ENTITY mux31 IS PORT (a, b, c : IN STD_LOGIC; en1, en2 : IN STD_LOGIC; z :OUT STD_LOGIC); END mux31; ARCHITECTURE behavioral OF mux31 IS BEGIN Z<= a WHEN en2 = '1' ELSE b WHEN en1= '1' ELSE c ; END behavioral;