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ARM7TDMI 32-BIt RISC CPU SRAM FLASH CPU Interface 32-Bt Memory DRAM efresh E对ema contre DeNIce EXt Bus System Extemal Bus Router Port A B Ethernet controller 18 I/O Ports Includ Ing 4: Ext INT req. 2-Channel BDMA 2: EXt DMA RE BDMA RAMS 2: EXI DMA ACK TX BUer (256 Btes, UART O1 Rx Buer(256 Bytes) CAM(128 Bytes) 32:mer0.1 MAC X FIFO(80 Bytes) MIl or GDMA 0. 1 Rx FIFO (16 Bytes) 7-wIre PLL TAP Controller for JT 三星4510B芯片的内部结构三星4510B芯片的内部结构
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