Contents xiii B.10 MIPS R2000 Assembly Language B-45 B.11 Concluding Remarks B-81 B.12 Exercises B-82 Index I-1 CD·ROM CONTENT The Basics of Logic Design C-2 C.1 Introduction C-3 C.2 Gates,Truth Tables,and Logic Equations C-4 C.3 Combinational Logic C-9 C.4 Using a Hardware Description Language C-20 C.5 Constructing a Basic Arithmetic Logic Unit C-26 C.6 Faster Addition:Carry Lookahead C-38 C.7 Clocks C-48 C.8 Memory Elements:Flip-Flops,Latches,and Registers C-50 C.9 Memory Elements:SRAMs and DRAMs C-58 C.10 Finite-State Machines C-67 C.11 Timing Methodologies C-72 C.12 Field Programmable Devices C-78 C.13 Concluding Remarks C-79 C.14 Exercises C-80 D Mapping Control to Hardware D-2 D.1 Introduction D-3 D.2 Implementing Combinational Control Units D-4 D.3 Implementing Finite-State Machine Control D-8 D.4 Implementing the Next-State Function with a Sequencer D-22 D.5 Translating a Microprogram to Hardware D-28 D.6 Concluding Remarks D-32 D.7 Exercises D-33 E A Survey of RISC Architectures for Desktop, Server,and Embedded Computers E-2 E.I Introduction E-3 E.2 Addressing Modes and Instruction Formats E-5 E.3 Instructions:The MIPS Core Subset E-9B.10 MIPS R2000 Assembly Language B-45 B.11 Concluding Remarks B-81 B.12 Exercises B-82 Index I-1 C D - R O M C O N T E N T The Basics of Logic Design C-2 C.1 Introduction C-3 C.2 Gates, Truth Tables, and Logic Equations C-4 C.3 Combinational Logic C-9 C.4 Using a Hardware Description Language C-20 C.5 Constructing a Basic Arithmetic Logic Unit C-26 C.6 Faster Addition: Carry Lookahead C-38 C.7 Clocks C-48 C.8 Memory Elements: Flip-Flops, Latches, and Registers C-50 C.9 Memory Elements: SRAMs and DRAMs C-58 C.10 Finite-State Machines C-67 C.11 Timing Methodologies C-72 C.12 Field Programmable Devices C-78 C.13 Concluding Remarks C-79 C.14 Exercises C-80 Mapping Control to Hardware D-2 D.1 Introduction D-3 D.2 Implementing Combinational Control Units D-4 D.3 Implementing Finite-State Machine Control D-8 D.4 Implementing the Next-State Function with a Sequencer D-22 D.5 Translating a Microprogram to Hardware D-28 D.6 Concluding Remarks D-32 D.7 Exercises D-33 A Survey of RISC Architectures for Desktop, Server, and Embedded Computers E-2 E.1 Introduction E-3 E.2 Addressing Modes and Instruction Formats E-5 E.3 Instructions: The MIPS Core Subset E-9 C D E Contents xiii