正在加载图片...
GND 40+Vc0(5V) AD14 AD AD AD 123456 39 AD A 37 A 36 8086 AD 10 AD 34*BHE/ 引脚 AD 789 8086 MN/MX AD CPU 32 RD 信号 AD 314→ HOLD(RQ/GT AD 123 30←HLDA(RQGT AD 29|·WR(LOCK) AD 28|→Mo(S2 AD 14 27→DTRS AD 15 26 DEn (So) AD ALE (QSo) NMI 17 24·TNTA(QS) INTR 18 23-TEST CLK 19 22 READY GND 21 RESET8086 引脚 信号 GND AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 NMI INTR CLK GND VCC (5V) AD15 A16/S3 A17/S4 A18/S5 A19/S6 BHE/S7 MN/MX RD HOLD (RQ/GT0 ) HLDA (RQ/GT1 ) WR (LOCK) M/IO (S2 ) DT/R (S1 ) DEN (S0 ) ALE (QS0 ) INTA (QS1 ) TEST READY RESET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 8086 CPU
<<向上翻页向下翻页>>
©2008-现在 cucdc.com 高等教育资讯网 版权所有