Laboratory Exercise 7 Finite State Machines This is an exercise in using finite state machines. PartI We wish to implement a finite state machine (EsM that recognizes two specific sequences of applied input sym bols,namely four consecutive Is or four consecutive 0s.There is an inputand an output=.Whenever1o eo four consecutive clock puseock pulses the output will be equal to I after the fo ck几几uuh几u几几几U Figure 1.Required timing for the output= Aed e dia the FSM use nine state flip-flops called ys.and the one-hot state assignment given in Table 1. State Code Name ysy7y6ysyysy2yo 000000001 <mU 000000100 00000100 EFG 00001000 01000000d 100000000 Table 1.One-hot codes for the FSM. Laboratory Exercise 7 Finite State Machines This is an exercise in using finite state machines. Part I We wish to implement a finite state machine (FSM) that recognizes two specific sequences of applied input sym￾bols, namely four consecutive 1s or four consecutive 0s. There is an input w and an output z. Whenever w = 1 or w = 0 for four consecutive clock pulses the value of z has to be 1; otherwise, z = 0. Overlapping sequences are allowed, so that if w = 1 for five consecutive clock pulses the output z will be equal to 1 after the fourth and fifth pulses. Figure 1 illustrates the required relationship between w and z. Clock w z Figure 1. Required timing for the output z. A state diagram for this FSM is shown in Figure 2. For this part you are to manually derive an FSM circuit that implements this state diagram, including the logic expressions that feed each of the state flip-flops. To implement the FSM use nine state flip-flops called y8,...,y0 and the one-hot state assignment given in Table 1. State Code Name y8y7y6y5y4y3y2y1y0 A 000000001 B 000000010 C 000000100 D 000001000 E 000010000 F 000100000 G 001000000 H 010000000 I 100000000 Table 1. One-hot codes for the FSM. 1