O Active-HDL 4.2 (design not loaded)-E: \MY _HOLdesignladder\srcWVHDL-Ox File Edit Search view Desi gn Simulation Tools Help 》x 26 27 procedure call(param1, param2, param); 29 wait for delay Wai语句 30 wait until condition: 1 walt: - wazt o2一- later. 32 33 if condition then |F语句 34 sequential statements 35 elsif condition then 36 sequential statements: 37 else 38 sequential statements 39 end if: d design flow Ewhdlstandar In77,Co167 NUM INSWait语句 — — later… - - IF语句