Abstract Digital Television has been developed rapidly,and is gradually replacing the traditional analog TV in recent years.The TV tuner,whose performance strongly determines the quality of the output audio and video,takes an important role in the DTV industry.As a result,many institutes have been engaged in the tuner design and other related research work,especially in the CMOS single-chip solution due to its advantages including low cost,low power and small size. This work presents the analysis and design of the tuner architecture specification,and build-up modules,with an eye to the difficulties in the single-chip integration. Firstly,an overview about the development of the DTV and tuner is provided. And the specification of the tuner is theoretically analyzed such as gain,noise figure and linearity,taking European DVB-T standard for an example. Secondly,the double conversion low IF architecture is introduced based on the comparison of the current popular architectures.The specification of the build-up modules is carefully distributed to make them easy to design. The RF front-end circuits of the tuner,including the variable gain low noise amplifier (VGLNA),the upconversion mixer,and the quadrature downconversion mixer are designed and then taped out.The measurement results verify the theoretical analysis. Finally,the tuner architecture is improved by exploiting a passive attenuator,to achieve better linearity,leading to larger dynamic range.The take-over point and the variable gain range are analyzed.In addition,a modified upconversion mixer is presented and taped out.The measurement results show the performance of the mixer satisfies the demands of the whole system. Key word:TV tuner,architecture,single-chip,double conversion,noise figure,linearity This project is supported by the National High Technology Research and Development Program of China(No.2007AA01Z282). WIV Abstract Digital Television has been developed rapidly, and is gradually replacing the traditional analog TV in recent years. The TV tuner, whose performance strongly determines the quality of the output audio and video, takes an important role in the DTV industry. As a result, many institutes have been engaged in the tuner design and other related research work, especially in the CMOS single-chip solution due to its advantages including low cost, low power and small size. This work presents the analysis and design of the tuner architecture, specification, and build-up modules, with an eye to the difficulties in the single-chip integration. Firstly, an overview about the development of the DTV and tuner is provided. And the specification of the tuner is theoretically analyzed such as gain, noise figure and linearity, taking European DVB-T standard for an example. Secondly, the double conversion low IF architecture is introduced based on the comparison of the current popular architectures. The specification of the build-up modules is carefully distributed to make them easy to design. The RF front-end circuits of the tuner, including the variable gain low noise amplifier (VGLNA), the upconversion mixer, and the quadrature downconversion mixer are designed and then taped out. The measurement results verify the theoretical analysis. Finally, the tuner architecture is improved by exploiting a passive attenuator, to achieve better linearity, leading to larger dynamic range. The take-over point and the variable gain range are analyzed. In addition, a modified upconversion mixer is presented and taped out. The measurement results show the performance of the mixer satisfies the demands of the whole system. Key word: TV tuner, architecture, single-chip, double conversion, noise figure, linearity This project is supported by the National High Technology Research and Development Program of China (No. 2007AA01Z282)