C723 1 OPAMP ↓ 8 FIGURE 13.1 Regulator circuit to be used for DC analysis, created using PSPICE. characteristic and verify that the output current follows a"fold-back type characteristic under overload conditions The IC itself contains a voltage reference source and operational amplifier. Simple models for these elements are used here rather than representing them in their full form, using transistors, to illustrate model development. The use of simplified models can also greatly reduce the simulation effort. For example, the simple op amp used here requires only eight nodes and ten components, yet realizes many advanced features. Note in Fig. 13. 1 that the numbers next to the wires represent the circuit nodes. These numbers are used to describe the circuit to the simulator. In most SPICE-type simulators the nodes are represented by numbers, with the ground node being node zero. Referring to Fig. 13. 2, the 723 regulator and its internal op amp are represented by subcircuits. Each subcircuit has its own set of nodes and components. Subcircuits are useful for encapsulating sections of a circuit or when a certain section needs to be used repeatedly (see next section The following properties are modeled in the op amp 1. Common mode gain 2. Differential mode gain 4. Output impedan 5. Dominant pole 6. Output voltage clipping The input terminals of the op amp connect to a"T" resistance network, which sets the common and differential mode input resistance. Therefore, the common mode resistance is RCM RDIF 1 1E6 and the differential mode resistance is rdifl+ rDiF2= 2.0E5 Dependent current sources are used to create the main gain elements. Because these sources force current into a 1-02 resistor, the voltage gain is gm*R at low frequency. In the differential mode this gives (gDif"RI 00). In the common mode this gives(GCM'RI"(RCM/(RDIFI RCM=0.0909). The two diodes DI and D2 implement clipping by preventing the voltage at node 6 from exceeding VCC or going below VEE. The nodes are made "ideal"by reducing the ideality factor n. Note that the diode current is I,=I, lexp(v/(nv) 1], where V, is the thermal voltage(0.026 V). Thus, reducing n makes the diode turn on at a lower voltage a single pole is created by placing a capacitor( C1)in parallel with resistor RI. The pole frequency is therefore iven by 1.0/(2*I'RI'C1). Finally, the output is driven by the voltage-controlled voltage source El (which has a voltage gain of unity), through the output resistor R4. The output resistance of the op amp is therefore equal to R4 To observe the output voltage as a function of resistance, the regulator is loaded with a voltage source(vOUT) and the voltage source is swept from 0.05 to 6.0 V A plot of output voltage vs. resistance can then be obtained c 2000 by CRC Press LLC© 2000 by CRC Press LLC characteristic and verify that the output current follows a “fold-back” type characteristic under overload conditions. The IC itself contains a voltage reference source and operational amplifier. Simple models for these elements are used here rather than representing them in their full form, using transistors, to illustrate model development. The use of simplified models can also greatly reduce the simulation effort. (For example, the simple op amp used here requires only eight nodes and ten components, yet realizes many advanced features.) Note in Fig. 13.1 that the numbers next to the wires represent the circuit nodes. These numbers are used to describe the circuit to the simulator. In most SPICE-type simulators the nodes are represented by numbers, with the ground node being node zero. Referring to Fig. 13.2, the 723 regulator and its internal op amp are represented by subcircuits. Each subcircuit has its own set of nodes and components. Subcircuits are useful for encapsulating sections of a circuit or when a certain section needs to be used repeatedly (see next section). The following properties are modeled in the op amp: 1. Common mode gain 2. Differential mode gain 3. Input impedance 4. Output impedance 5. Dominant pole 6. Output voltage clipping The input terminals of the op amp connect to a “T” resistance network, which sets the common and differential mode input resistance. Therefore, the common mode resistance is RCM + RDIF = 1.1E6 and the differential mode resistance is RDIF1 + RDIF2 = 2.0E5. Dependent current sources are used to create the main gain elements. Because these sources force current into a 1-W resistor, the voltage gain is Gm*R at low frequency. In the differential mode this gives (GDIF*R1 = 100). In the common mode this gives (GCM*R1*(RCM/(RDIF1 + RCM = 0.0909). The two diodes D1 and D2 implement clipping by preventing the voltage at node 6 from exceeding VCC or going below VEE. The diodes are made “ideal” by reducing the ideality factor n. Note that the diode current is Id = Is[exp(Vd /(nVt)) – 1], where Vt is the thermal voltage (0.026 V). Thus, reducing n makes the diode turn on at a lower voltage. A single pole is created by placing a capacitor (C1) in parallel with resistor R1. The pole frequency is therefore given by 1.0/(2*p*R1*C1). Finally, the output is driven by the voltage-controlled voltage source E1 (which has a voltage gain of unity), through the output resistor R4. The output resistance of the op amp is therefore equal to R4. To observe the output voltage as a function of resistance, the regulator is loaded with a voltage source (VOUT) and the voltage source is swept from 0.05 to 6.0 V. A plot of output voltage vs. resistance can then be obtained FIGURE 13.1 Regulator circuit to be used for DC analysis, created using PSPICE