存储同一性( Memory Consistency) TABLE 3. 3: Can Both r1 and r2 be Set to O? Core CI Core C2 Comments SI: X= NEW S2: y=NEW: /*Initially,x=0&y=0*/ LI: rl=y; L2:r2=x; 可能的执行顺序(假设可全乱序假设遵循 SC Model): SILIS2L2(O,NEW S2S1LIL2(NEW, NEW) LIS1S2L2(0, NEW) L2SIL1S2(0,0) S1LIL2S2(0, NEW S2S1L2LI(NEW,NEW) LIS1L2S2(0,NEW L2S1S2L1 (NEW,O) SIS2LIL2(NEW,NEW) S2L1SIL2(NEW,NEW) L1S2S1L2(0, NEW) L2L1S1S2(0,0) SIS2L2L1(NEW,NEW) S2L1L2SI(NEW,O) L1S2L2S1(0,0)L2L1S2S1(0,0) SIL2L1S2(0, NEW S2L2SILI(NEW,O L1L2S1S2(00) L2S2S1LI(NEW,O SIL2S2LI(NEW,NEW S2L2LISI(NEW,O) L1L2S2S1(0,0) L2S2L1S1(0,0) 2021/2/7 计算机体系结构存储同一性（Memory Consistency) 可能的执行顺序（假设可全乱序|假设遵循SC Model）： S1L1S2L2 (0,NEW) S2S1L1L2 (NEW, NEW) L1S1S2L2 (0, NEW) L2S1L1S2(0,0) S1L1L2S2 (0,NEW) S2S1L2L1(NEW,NEW) L1S1L2S2(0,NEW) L2S1S2L1 (NEW,0) S1S2L1L2(NEW,NEW) S2L1S1L2(NEW,NEW) L1S2S1L2(0,NEW) L2L1S1S2(0,0) S1S2L2L1(NEW,NEW) S2L1L2S1(NEW,0) L1S2L2S1(0,0) L2L1S2S1(0,0) S1L2L1S2(0,NEW) S2L2S1L1(NEW,0) L1L2S1S2(0,0) L2S2S1L1(NEW,0) S1L2S2L1(NEW,NEW) S2L2L1S1(NEW,0) L1L2S2S1(0,0) L2S2L1S1(0,0) 2021/2/7 计算机体系结构 24