典型的RSC5段流水线 Fetch Decode EXecute Memory I Writeback Data Instruction Cache d Cache o0∝ This version designed for regfiles/ memories with synchronous reads and writes 6典型的 RISC 5段流水线 6 Fetch Decode EXecute Memory Registers ALU B A Data Cache PC Instruction Cache Store Imm Inst. Register Writeback This version designed for regfiles/memories with synchronous reads and writes