4.辅助进程 K述列 【例7-1】 工工 BRARY工EEE; USE IEEE STD LOGIC 1164.ALL ENTITY s machine工S PORT( clk, reset :工 N STD LOG工C; state inputs IN STD LOGIC VECTOR (0 To 1)i comb outputs oUT INTEGER RANGE 0 To 15)i END s machine ARCHITECTURE ehv oF s machine Is TYPE FSM ST Is (so, sl, s2 s3)i SIGNAL current state next state: FSM ST BEG工N REG: PROCEss (reset, clk) BEG工N IF reset =i1then current state < so ElSIE clk=1 AND clK EVENT THEN current state < next statei END工F; END PROCESS i COM: PROCESS(current state, state Inputs) 接下页KX 康芯科技 4. 辅助进程 【例7-1】 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY s_machine IS PORT ( clk,reset : IN STD_LOGIC; state_inputs : IN STD_LOGIC_VECTOR (0 TO 1); comb_outputs : OUT INTEGER RANGE 0 TO 15 ); END s_machine; ARCHITECTURE behv OF s_machine IS TYPE FSM_ST IS (s0, s1, s2, s3); SIGNAL current_state, next_state: FSM_ST; BEGIN REG: PROCESS (reset,clk) BEGIN IF reset = '1' THEN current_state <= s0; ELSIF clk='1' AND clk'EVENT THEN current_state <= next_state; END IF; END PROCESS; COM:PROCESS(current_state, state_Inputs) 接下页