• Synthesizable • Some experiences ➢ Balance architecture ➢ Share resources ➢ Gated signal ➢Assignment statement ➢ Accident / Intentional Latch • Other syntax rules

• Topics Covered • Requirements • Others Info

• ASIC Classification • Design Flow and tools • Design Domains & Levels

• History, Present & Future • Manufacturing Process • Some Terms

3.1 Definition of data structure 3.2 Stacks 3.3 Queues 3.4 Linked lists 3.5 Trees 3.6 Postfix expression 3.7 Infix to postfix conversion

5.1 Dictionary problem 5.2 Hash functions 5.3 Collisions resolution by chaining 5.4 Open addressing 5.5 Probing strategies: linear, quadratic, and double hashing 5.6 Analysis of open addressing

7.1 Introduction to amortized analysis 7.2 Aggregate method 7.3 Accounting method 7.4 Potential method 7.5 Dynamic tables

9.1 Activity-selection problem 9.2 Introduction to greedy solution 9.3 Steps of the greedy strategy 9.4 Knapsack problem 9.5 Huffman code

电子科技大学：《微电子器件》课程教学资源（思政教案）高频晶体管设计

一、模型的整体设计 二、合理假设