cL7106,cL7107,cL7106s,|cL7107S The second function is a"lamp test. When TEST is pulled Digital Section high(to V+)all segments will be turned on and the display should read1888". The TEST pin will sink about 15ma Figures 7 and 8 show the digital section for the ICL7106 and under these conditions ICL7107, respectively. In the ICL7106, an internal digital voltage(no square-wave). This may burn the LCD display int Dc ground is generated from a 6V Zener diode and a large P-Channel source follower. This supply is made stiff to plane(BP) voltage is switched. The BP frequency is the clock frequency divided by 800. For three readings/sec., this is a 60Hz square wave with a nominal amplitude of 5V. the egments are driven at the same frequency and amplitude and are in phase with BP when OF F, but out of phase when ON. In all cases negligible DC voltage exists across the ICL7106 DECIMAL Figure 8 is the Digital Section of the ICL7107. It is identical SELECT to the ICL7106 except that the regulated supply and back plane drive have been eliminated and the segment drive has TEST been increased from 2mA to 8mA, typical for instrument size cD4030 AGND common anode LEd displays. Since the 1000 output(pin 19) must sink current from two LED segments, it has twice the drive capability or 16mA. FIGURE 6. EXCLUSIVE ' GATE FOR DECIMAL POINT DRIVE In both devices, the polarity indication is"on"for negative analog inputs. If IN LO and IN HI are reversed, this indication B5579 BACKPLANE ------}- LCD PHASE DRIVER TYPICAL SEGMENT OUTPUT DECODE II DECODE II DECODE ■■■ ■■■ GMEN LATCH COUNTER ICOUNTERCOUNTERCOUNTER INTERNAL DIGITAL GROUN TO SWITCH DRIVERS FROM COMPARATOR OUTPUT CLOCK LOGIC CoNTR THREE INVERTERS TEST ONE INVERTER SHOWN FOR CLARITY OSC 28 The second function is a “lamp test”. When TEST is pulled high (to V+) all segments will be turned on and the display should read “1888”. The TEST pin will sink about 15mA under these conditions. CAUTION: In the lamp test mode, the segments have a constant DC voltage (no square-wave). This may burn the LCD display if main￾tained for extended periods. Digital Section Figures 7 and 8 show the digital section for the ICL7106 and ICL7107, respectively. In the ICL7106, an internal digital ground is generated from a 6V Zener diode and a large P-Channel source follower. This supply is made stiff to absorb the relative large capacitive currents when the back plane (BP) voltage is switched. The BP frequency is the clock frequency divided by 800. For three readings/sec., this is a 60Hz square wave with a nominal amplitude of 5V. The segments are driven at the same frequency and amplitude and are in phase with BP when OFF, but out of phase when ON. In all cases negligible DC voltage exists across the segments. Figure 8 is the Digital Section of the ICL7107. It is identical to the ICL7106 except that the regulated supply and back plane drive have been eliminated and the segment drive has been increased from 2mA to 8mA, typical for instrument size common anode LED displays. Since the 1000 output (pin 19) must sink current from two LED segments, it has twice the drive capability or 16mA. In both devices, the polarity indication is “on” for negative analog inputs. If IN LO and IN HI are reversed, this indication can be reversed also, if desired. ICL7106 V+ BP TEST DECIMAL POINT SELECT CD4030 GND V+ TO LCD DECIMAL POINTS FIGURE 6. EXCLUSIVE ‘OR’ GATE FOR DECIMAL POINT DRIVE 7 SEGMENT DECODE SEGMENT OUTPUT 0.5mA 2mA INTERNAL DIGITAL GROUND TYPICAL SEGMENT OUTPUT V+ LCD PHASE DRIVER LATCH 7 SEGMENT DECODE ÷200 LOGIC CONTROL INTERNAL VTH = 1V 7 SEGMENT DECODE 1000’s 100’s 10’s 1’s TO SWITCH DRIVERS FROM COMPARATOR OUTPUT DIGITAL GROUND ÷4 CLOCK 40 39 38 OSC 1 OSC 2 OSC 3 BACKPLANE 21 V+ TEST V- 500Ω 37 26 6.2V COUNTER COUNTER COUNTER COUNTER 1 c a b c d f g e a b a b c d f g e a b c d f g e † † THREE INVERTERS ONE INVERTER SHOWN FOR CLARITY FIGURE 7. ICL7106 DIGITAL SECTION ICL7106, ICL7107, ICL7106S, ICL7107S