6 Ni Ronghua et al.:Analysis and Design of a Quadrature Down-Conversion Mixer for UHF RFID Readers 1133 or occupied larger chip area.In the Q-mixer,the trade-off is solved inherently because the bias current in the transconductor stage is halved between the I and Q path,which enables us to optimize the transconductor stage without performance penalty in the switching stage. In consideration of the adjacent channel interfer- ence from other readers,high linearity is required for a down-conversion mixer,and,as stated in Section 2.2,it is limited by the transconductor stage.So,the multiple gated transistor (MGTR)configuration first proposed by Kim et al.in Ref.[7]is adopted here,in Divide-by-Twe which an auxiliary transistor (AT)operating in the sub-threshold region is superposed in parallel with the main transistor (MT)operating in the saturation re- gion.The size and the gate bias of the MT and AT are Fig.8 Microphotograph of chip different and carefully chosen to make the third-order inter-modulation component of the AT offset that of the MT,which gives the transconductance stage and, thus,the whole mixer a much higher IIP3.Further- more,poly-silicon resistors are used as loads to assure linearity. According to the noise analysis in Section 2.3, the low frequency noise is dominated by flicker noise of the switching pairs.Therefore,the parasitic verti- cal npn bipolar junction transistor (V-NPN BJT)in the deep n-well CMOS process,which shows a much @o3如浏 0o■ lower corner frequency for flicker noise,is used as a Fig.9 I/Q output waveforms switching transistor instead of MOSFETs].Also,the poly-silicon resistors are free of flicker noise and their I/Q waveforms are shown in Fig.9,which indicates resistance can be made larger to restrain the white average phase error below 1.2'and amplitude error noise contribution. below 0.2dB,including imbalance introduced by divi- der,baluns,bonding,and buffers. 4 Chip implementation and measure- The measured CG is 12.5dB (IF=500kHz),with ments a 1dB compression point P-idB of -5dBm,as shown in Fig.10.The linearity is measured with a two-tone The presented mixer was fabricated in a 0.18um test at 915MHz LO frequency and 915.5MHz, 1P6M RF CMOS process.As high frequency quadra- 915.7MHz RF frequency.Figure 11 shows the output ture signals are not practical to obtain,a divide-by- spectrum of the two-tone test.As shown in Fig.12,the two circuit is also designed and implemented to gener- measured IIP3 and IIP2 are 10dBm and 58dBm,re- ate the quadrature LO signals.Special layout technol- spectively.The SSB NF is measured 17.6dB at 1MHz, ogies,such as common-centroid,interdigitation,dum- my,symmetry etc.,are used to attain good matching 10 and high IIP2.The microphotograph of the chip is shown in Fig.8.The total die area including bonding pads is0.85mm×0.74mm,with0.38mm×0.48mm -5 for the quadrature mixer core.The 1/Q quadrature P.idm--5dBm mixer including bias circuits draws a total of 3mA -15 from a 1.8V power supply. -20 The RF and 2LO signals are generated by Vector Signal Generator E4438C and the output IF signals -254035-3025-2010505 Input/dBm are displayed and analyzed by Oscilloscope MS08104A and Spectrum Analyzer E4440A.The down-converted Fig.10 Measured -1dB compression point第６期 犖犻犚狅狀犵犺狌犪犲狋犪犾．： 犃狀犪犾狔狊犻狊犪狀犱犇犲狊犻犵狀狅犳犪犙狌犪犱狉犪狋狌狉犲犇狅狑狀犆狅狀狏犲狉狊犻狅狀犕犻狓犲狉犳狅狉犝犎犉犚犉犐犇 犚犲犪犱犲狉狊 狅狉狅犮犮狌狆犻犲犱犾犪狉犵犲狉犮犺犻狆 犪狉犲犪．犐狀 狋犺犲 犙犿犻狓犲狉，狋犺犲 狋狉犪犱犲狅犳犳犻狊狊狅犾狏犲犱犻狀犺犲狉犲狀狋犾狔犫犲犮犪狌狊犲狋犺犲犫犻犪狊犮狌狉狉犲狀狋 犻狀狋犺犲狋狉犪狀狊犮狅狀犱狌犮狋狅狉狊狋犪犵犲犻狊犺犪犾狏犲犱犫犲狋狑犲犲狀狋犺犲犐 犪狀犱 犙 狆犪狋犺，狑犺犻犮犺 犲狀犪犫犾犲狊 狌狊 狋狅 狅狆狋犻犿犻狕犲 狋犺犲 狋狉犪狀狊犮狅狀犱狌犮狋狅狉狊狋犪犵犲狑犻狋犺狅狌狋狆犲狉犳狅狉犿犪狀犮犲狆犲狀犪犾狋狔犻狀 狋犺犲狊狑犻狋犮犺犻狀犵狊狋犪犵犲． 犐狀犮狅狀狊犻犱犲狉犪狋犻狅狀狅犳狋犺犲犪犱犼犪犮犲狀狋犮犺犪狀狀犲犾犻狀狋犲狉犳犲狉 犲狀犮犲犳狉狅犿狅狋犺犲狉狉犲犪犱犲狉狊，犺犻犵犺犾犻狀犲犪狉犻狋狔犻狊狉犲狇狌犻狉犲犱犳狅狉 犪犱狅狑狀犮狅狀狏犲狉狊犻狅狀 犿犻狓犲狉，犪狀犱，犪狊狊狋犪狋犲犱犻狀 犛犲犮狋犻狅狀 ２２，犻狋犻狊犾犻犿犻狋犲犱犫狔狋犺犲狋狉犪狀狊犮狅狀犱狌犮狋狅狉狊狋犪犵犲．犛狅，狋犺犲 犿狌犾狋犻狆犾犲犵犪狋犲犱狋狉犪狀狊犻狊狋狅狉（犕犌犜犚）犮狅狀犳犻犵狌狉犪狋犻狅狀犳犻狉狊狋 狆狉狅狆狅狊犲犱犫狔犓犻犿犲狋犪犾．犻狀犚犲犳．［７］犻狊犪犱狅狆狋犲犱犺犲狉犲，犻狀 狑犺犻犮犺犪狀犪狌狓犻犾犻犪狉狔狋狉犪狀狊犻狊狋狅狉 （犃犜）狅狆犲狉犪狋犻狀犵犻狀狋犺犲 狊狌犫狋犺狉犲狊犺狅犾犱狉犲犵犻狅狀犻狊狊狌狆犲狉狆狅狊犲犱犻狀狆犪狉犪犾犾犲犾狑犻狋犺狋犺犲 犿犪犻狀狋狉犪狀狊犻狊狋狅狉（犕犜）狅狆犲狉犪狋犻狀犵犻狀狋犺犲狊犪狋狌狉犪狋犻狅狀狉犲 犵犻狅狀．犜犺犲狊犻狕犲犪狀犱狋犺犲犵犪狋犲犫犻犪狊狅犳狋犺犲犕犜犪狀犱犃犜犪狉犲 犱犻犳犳犲狉犲狀狋犪狀犱犮犪狉犲犳狌犾犾狔犮犺狅狊犲狀狋狅犿犪犽犲狋犺犲狋犺犻狉犱狅狉犱犲狉 犻狀狋犲狉犿狅犱狌犾犪狋犻狅狀犮狅犿狆狅狀犲狀狋狅犳狋犺犲犃犜狅犳犳狊犲狋狋犺犪狋狅犳 狋犺犲犕犜，狑犺犻犮犺犵犻狏犲狊狋犺犲狋狉犪狀狊犮狅狀犱狌犮狋犪狀犮犲狊狋犪犵犲犪狀犱， 狋犺狌狊，狋犺犲 狑犺狅犾犲 犿犻狓犲狉犪 犿狌犮犺犺犻犵犺犲狉犐犐犘３．犉狌狉狋犺犲狉 犿狅狉犲，狆狅犾狔狊犻犾犻犮狅狀狉犲狊犻狊狋狅狉狊犪狉犲狌狊犲犱犪狊犾狅犪犱狊狋狅犪狊狊狌狉犲 犾犻狀犲犪狉犻狋狔． 犃犮犮狅狉犱犻狀犵狋狅狋犺犲狀狅犻狊犲犪狀犪犾狔狊犻狊犻狀犛犲犮狋犻狅狀２．３， 狋犺犲犾狅狑犳狉犲狇狌犲狀犮狔狀狅犻狊犲犻狊犱狅犿犻狀犪狋犲犱犫狔犳犾犻犮犽犲狉狀狅犻狊犲 狅犳狋犺犲狊狑犻狋犮犺犻狀犵狆犪犻狉狊．犜犺犲狉犲犳狅狉犲，狋犺犲狆犪狉犪狊犻狋犻犮狏犲狉狋犻 犮犪犾狀狆狀犫犻狆狅犾犪狉犼狌狀犮狋犻狅狀狋狉犪狀狊犻狊狋狅狉 （犞犖犘犖 犅犑犜）犻狀 狋犺犲犱犲犲狆狀狑犲犾犾犆犕犗犛狆狉狅犮犲狊狊，狑犺犻犮犺狊犺狅狑狊犪 犿狌犮犺 犾狅狑犲狉犮狅狉狀犲狉犳狉犲狇狌犲狀犮狔犳狅狉犳犾犻犮犽犲狉狀狅犻狊犲，犻狊狌狊犲犱犪狊犪 狊狑犻狋犮犺犻狀犵狋狉犪狀狊犻狊狋狅狉犻狀狊狋犲犪犱狅犳 犕犗犛犉犈犜［８］ ．犃犾狊狅，狋犺犲 狆狅犾狔狊犻犾犻犮狅狀狉犲狊犻狊狋狅狉狊犪狉犲犳狉犲犲狅犳犳犾犻犮犽犲狉狀狅犻狊犲犪狀犱狋犺犲犻狉 狉犲狊犻狊狋犪狀犮犲犮犪狀犫犲 犿犪犱犲犾犪狉犵犲狉狋狅狉犲狊狋狉犪犻狀狋犺犲 狑犺犻狋犲 狀狅犻狊犲犮狅狀狋狉犻犫狌狋犻狅狀． ４ 犆犺犻狆犻犿狆犾犲犿犲狀狋犪狋犻狅狀 犪狀犱 犿犲犪狊狌狉犲 犿犲狀狋狊 犜犺犲狆狉犲狊犲狀狋犲犱犿犻狓犲狉狑犪狊犳犪犫狉犻犮犪狋犲犱犻狀犪０１８μ犿 １犘６犕 犚犉犆犕犗犛狆狉狅犮犲狊狊．犃狊犺犻犵犺犳狉犲狇狌犲狀犮狔狇狌犪犱狉犪 狋狌狉犲狊犻犵狀犪犾狊犪狉犲狀狅狋狆狉犪犮狋犻犮犪犾狋狅狅犫狋犪犻狀，犪犱犻狏犻犱犲犫狔 狋狑狅犮犻狉犮狌犻狋犻狊犪犾狊狅犱犲狊犻犵狀犲犱犪狀犱犻犿狆犾犲犿犲狀狋犲犱狋狅犵犲狀犲狉 犪狋犲狋犺犲狇狌犪犱狉犪狋狌狉犲犔犗狊犻犵狀犪犾狊．犛狆犲犮犻犪犾犾犪狔狅狌狋狋犲犮犺狀狅犾 狅犵犻犲狊，狊狌犮犺犪狊犮狅犿犿狅狀犮犲狀狋狉狅犻犱，犻狀狋犲狉犱犻犵犻狋犪狋犻狅狀，犱狌犿 犿狔，狊狔犿犿犲狋狉狔犲狋犮．，犪狉犲狌狊犲犱狋狅犪狋狋犪犻狀犵狅狅犱 犿犪狋犮犺犻狀犵 犪狀犱犺犻犵犺犐犐犘２．犜犺犲 犿犻犮狉狅狆犺狅狋狅犵狉犪狆犺狅犳狋犺犲犮犺犻狆犻狊 狊犺狅狑狀犻狀犉犻犵．８．犜犺犲狋狅狋犪犾犱犻犲犪狉犲犪犻狀犮犾狌犱犻狀犵犫狅狀犱犻狀犵 狆犪犱狊犻狊０８５犿犿×０７４犿犿，狑犻狋犺０３８犿犿 ×０４８犿犿 犳狅狉狋犺犲狇狌犪犱狉犪狋狌狉犲 犿犻狓犲狉犮狅狉犲．犜犺犲犐／犙 狇狌犪犱狉犪狋狌狉犲 犿犻狓犲狉犻狀犮犾狌犱犻狀犵犫犻犪狊犮犻狉犮狌犻狋狊犱狉犪狑狊犪狋狅狋犪犾狅犳３犿犃 犳狉狅犿犪１８犞狆狅狑犲狉狊狌狆狆犾狔． 犜犺犲犚犉犪狀犱２犔犗狊犻犵狀犪犾狊犪狉犲犵犲狀犲狉犪狋犲犱犫狔犞犲犮狋狅狉 犛犻犵狀犪犾犌犲狀犲狉犪狋狅狉犈４４３８犆 犪狀犱狋犺犲狅狌狋狆狌狋犐犉狊犻犵狀犪犾狊 犪狉犲犱犻狊狆犾犪狔犲犱犪狀犱犪狀犪犾狔狕犲犱犫狔犗狊犮犻犾犾狅狊犮狅狆犲犕犛０８１０４犃 犪狀犱犛狆犲犮狋狉狌犿 犃狀犪犾狔狕犲狉犈４４４０犃．犜犺犲犱狅狑狀犮狅狀狏犲狉狋犲犱 犉犻犵．８ 犕犻犮狉狅狆犺狅狋狅犵狉犪狆犺狅犳犮犺犻狆 犉犻犵．９ 犐／犙狅狌狋狆狌狋狑犪狏犲犳狅狉犿狊 犐／犙 狑犪狏犲犳狅狉犿狊犪狉犲狊犺狅狑狀犻狀犉犻犵９，狑犺犻犮犺犻狀犱犻犮犪狋犲狊 犪狏犲狉犪犵犲狆犺犪狊犲犲狉狉狅狉犫犲犾狅狑１２°犪狀犱犪犿狆犾犻狋狌犱犲犲狉狉狅狉 犫犲犾狅狑０２犱犅，犻狀犮犾狌犱犻狀犵犻犿犫犪犾犪狀犮犲犻狀狋狉狅犱狌犮犲犱犫狔犱犻狏犻 犱犲狉，犫犪犾狌狀狊，犫狅狀犱犻狀犵，犪狀犱犫狌犳犳犲狉狊． 犜犺犲犿犲犪狊狌狉犲犱犆犌犻狊１２５犱犅 （犐犉＝５００犽犎狕），狑犻狋犺 犪１犱犅犮狅犿狆狉犲狊狊犻狅狀狆狅犻狀狋犘－１犱犅 狅犳 －５犱犅犿，犪狊狊犺狅狑狀 犻狀犉犻犵１０．犜犺犲犾犻狀犲犪狉犻狋狔犻狊犿犲犪狊狌狉犲犱狑犻狋犺犪狋狑狅狋狅狀犲 狋犲狊狋 犪狋 ９１５犕犎狕 犔犗 犳狉犲狇狌犲狀犮狔 犪狀犱 ９１５５犕犎狕， ９１５７犕犎狕犚犉犳狉犲狇狌犲狀犮狔．犉犻犵狌狉犲１１狊犺狅狑狊狋犺犲狅狌狋狆狌狋 狊狆犲犮狋狉狌犿狅犳狋犺犲狋狑狅狋狅狀犲狋犲狊狋．犃狊狊犺狅狑狀犻狀犉犻犵１２，狋犺犲 犿犲犪狊狌狉犲犱犐犐犘３犪狀犱犐犐犘２犪狉犲１０犱犅犿 犪狀犱５８犱犅犿，狉犲 狊狆犲犮狋犻狏犲犾狔．犜犺犲犛犛犅犖犉犻狊犿犲犪狊狌狉犲犱１７６犱犅犪狋１犕犎狕， 犉犻犵．１０ 犕犲犪狊狌狉犲犱－１犱犅犮狅犿狆狉犲狊狊犻狅狀狆狅犻狀狋 １１３３