How to Create VHDL circuit symbol vhdl yhd Text editor 口区 ho MAX+plus ll-Untitled1 ENTITY vhdl Is MAX+plus ll Eile Edit Iemplates Assign Utilities PORT( a,b: in bit in std logic. Compiler END Uhd Compiler Database Logic ARCHITEC Netlist Builder Synthe Ctrl+F4 Ctrl+S BEGIN Extractor about Ctrl+ clout end vhdl Line 10 de file Ctrl+P Start Enter you VhDl coae Alt+F4 bBRA Copyright 1997 Altera Corporation Create a Symbol for Graphical use 9/12/97Copyright © 1997 Altera Corporation 9/12/97 How to Create VHDL circuit symbol Enter you VHDL code Create a Symbol for Graphical use