ARITHMETIC CORE INSTRUCTION SET ① OPCODE oya8o1 MIPS /FMT/FT Reference Data FOR- FUNGT NAME,MNEMONIC MAT OPERATION (Hex) CORE INSTRUCTION SET OPCODE Branch On FP True belt FI ifFPcondPC-PC+4+BranchAddr (4) 118/1/- FOR /FUNCT Branch On FP False beit if!FPeond)PC-PC+4+BranchAddr(4) 11/80/- NAME,MNEMONIC MAT (Hex) Divide div Lo-R[rsVR[rt]:Hi-R[rs]%R[rt] 0-1a pue g OPERATION (in Verilog) Divide Unsigned Add add R RIrd]■Rs+Rtl (1)0/20 divu R Lo-R[rsVR[rt]:Hi-R[rs]%R(rt] 60M1b FP Add Single add.s FR 11/10-0 Add Immediate add! R[rt]-R[rs]+SignExtlmm (1,2) F[fd ]F[fs]+F[ft) FPAdd add.d FR {F,Fl叶1》-F国.FE+1}+ Add Imm.Unsigned addiu Rfrt]-R[rs]+SignExtlmm (2 Double 11/11-0 F[,F+1} Add Unsigned addu R Rfrd]-Rfrs]+Rfrt] 0/21be FP Compare Single e.x.s FR FPcond -(F[fs]op F[ft])?1:0 11/10-y suunjoo)apis wonoq plod' And and R Rfrd]-Rfrs]Rfrt) 0 /24pe FP Compare Double FR eoad-+31:0 11/1-y And Immediate Rfrt]=Rfrs]ZeroExtlmm Chex is ag.it,or 1o)(op is -,or <)(y is 32.3c,or 3e) if(R(rs]--R[rt]) FP Divide Single div.s FR Fffd]-F[fs]/F[ft] 11/10/-3 Branch On Equal beg PC-PC+4+BranchAd恤 (4) FP Divide FIF+1]}-FFE+h/ 11/11/-3 ifRfrs]!-Rfnt]) Double div.d FR F[m,F[+1]} Branch On Not Equalbne PC-PC+4+BranchAddr (④ Swes FP Multiply Single mul.s FR F-F闯·F间 1/10/-2 Jump PC-JumpAddr (S) Zves FP Multiply mul.d FR F.F+I]}-Fs,F+1]}◆ 11/11/-2 Double {F[,Fi+1} Jump And Link R[31]-PC+8:PC-JumpAddr (5 3九e FP Subtract Single sub.s FR F[fd]-F[fs]-F[ft] 11/10w-1 Jump Register R PC-R[rs] 0108a FP Subtract Double sub.d FR F,F+1B-F[sF+1]}- 11/11-/1 R-{24b0,MR[s间 {F可，F+1]} Load Byte Unsigned 1bu (2) 24bex Load FP Single Iwel Ffrt]-M[RfrsH+SignExtlmm] (2)31/-/- Load Halfword Load FP F[rt]-M[R[rs]+SignExtlmm]: 1hu R[rt]-116'b0,M[R[rs] 1dc1 Unsigned +SignExtlmmM15:0)) (2) Double Ffrt+1]-M(Rfrs]+SignExtlmm+4] 2)35--- 30gex Move From Hi Load Linked 11 R Rd-H田 010 Rfrt]-M[Rfrs}+SignExtlmm] 27) Move From Lo 厘f1o R Rfrd]=Lo 0/12 Load Upper Imm 1u Rfrt]-imm,16'bo) Move From Control 里1c0 Rfrd]-CR[rs] 100W-0 Load Word R(rt]-M[R[rsH+SignExtlmm] (2) Multiply (Hi,Lo)-R(rs]*R[rt] 0.人-18 Nor nor RR[rd]-~(RIrs]|R[rt] 0 /27be Multiply Unsigned u11 Hi.Lo)R[rs]*Rfrt] (60-/19 0/25bex Shift Right Arith. R Rfrd]-R[rt]>>shamt Rfrd]-R[s]|R[rt] 0--3 or R Store FP Single M[R[rs]+SignExtlmm]-FIrt] (2)39-/- Or Immediate R(rt]-R[rs]ZeroExtlmm (3) Store FP sdel MR[rs+SignExtlmm]-FIrt]: 2)3dw-/-- Set Less Than slt R Rd-(Rs<Rt？1:0 0/2e Double M[R(rs]+SignExtlmm+4]-F[rt+1 Set Less Than Imm. sIti I Rfrt]-(Rfrs]SignExtlmm)?1 0 (2) FLOATING-POINT INSTRUCTION FORMATS Set Less Than Imm. R[rt](R[rs]SignExtlmm) FR d Buoe opeode funct Unsigned 91:0 26 0 65 Set Less Than Unsig.s1tu R Rfrd]-(R[rs]Rfrt])?1:0 (6)0/2b3 FI Imt immediate lInd'I Shift Left Logical 11 RR[rd]-Rfrt]<shamt 0100e 3到 2625 Shift Right Logical R Rfrd]-R[rt]>>shamt 0/02ea PSEUDOINSTRUCTION SET Store Byte M[R(rs}+SignExtlmm](7:0)- NAME MNEMONIC OPERATION sb R470 (2) Branch Less Than bIt ifRfrs]<Rfrt))PC-Label Store Conditional MRfrs}+SignExtlmm]-Rfrt]: Branch Greater Than bgt if(R[rs]>R[rt])PC-Label R可-(atomic)？i:0 2,7) 38bex Branch Less Than or Equal ble iRs]小-R(r])PC=Label Branch Greater Than or Equal bge if(R[rs]-R(rt])PC-Label Store Halfword M[R(rs]+SignExtlmml(15:0)= sh R15:0) (2) 29bex Load Immediate 11 RIrd-irmmedsate Move Rfrd]-R[rs] uaa5) Store Word SW I MIR(rs]+SignExtlmm]-Rfrt] (2) REGISTER NAME,NUMBER,USE.CALL CONVENTION Subtract sub RRd-R[s图-R[ (1)0/22e 0/23be NAME NUMBER USE PRESERVEDACROSS Subtract Unsigned subu R Rfrd]-R[rs]-R(rt] A CALL? pe2 (1)May cause overflow exception 5他t0 The Constant value 0 N.A. (2)SignExtlmm -{16(immediate[15]),immediate Sat Assembler Temporary No (3)ZeroExtlmm16{1b'0),immediate (4)BranchAddr(14(immediate[15]),immediate,2'b0 Svo-SvI 2-3 Values for Function Results Ne (5)JumpAddr=fP℃+431：28l.ad山es线.2"b01 and Expression Evaluation (6)Operands considered unsigned numbers (vs.2's comp.) 47 Arguments No (7)Atomic test&set pair;Rfrt]=I if pair atomic.0 if not atomic STFS17 813 Temporaries No BASIC INSTRUCTION FORMATS 5S057 16-23 Saved Temporaries 24-25 Temporaries No EL shamt Sk0-Sk1 26-27 Reserved for OS Kemel No 2120 6 5 65 28 Global Pointer Yes opcode immediate Ssp 29 Stack Pointer Yes 2625 212 615 30 上tame pointer Yes d Retumn Adress Yes Copyright 2009 by Elseviet,Inc..All rights reserved.From Patterson and Hennessy,Computer Organization and Design,4th ed.M I P S Reference Data BASIC INSTRUCTION FORMATS REGISTER NAME, NUMBER, USE, CALL CONVENTION CORE INSTRUCTION SET OPCODE NAME, MNEMONIC FOR￾MAT OPERATION (in Verilog) / FUNCT (Hex) Add add R R[rd] = R[rs] + R[rt] (1) 0 / 20hex Add Immediate addi I R[rt] = R[rs] + SignExtImm (1,2) 8hex Add Imm. Unsigned addiu I R[rt] = R[rs] + SignExtImm (2) 9hex Add Unsigned addu R R[rd] = R[rs] + R[rt] 0 / 21hex And and R R[rd] = R[rs] & R[rt] 0 / 24hex And Immediate andi I R[rt] = R[rs] & ZeroExtImm (3) chex Branch On Equal beq I if(R[rs]==R[rt]) PC=PC+4+BranchAddr (4) 4hex Branch On Not Equal bne I if(R[rs]!=R[rt]) PC=PC+4+BranchAddr (4) 5hex Jump j J PC=JumpAddr (5) 2hex Jump And Link jal J R[31]=PC+8;PC=JumpAddr (5) 3hex Jump Register jr R PC=R[rs] 0 / 08hex Load Byte Unsigned lbu I R[rt]={24’b0,M[R[rs] +SignExtImm](7:0)} (2) 24hex Load Halfword Unsigned lhu I R[rt]={16’b0,M[R[rs] +SignExtImm](15:0)} (2) 25hex Load Linked ll I R[rt] = M[R[rs]+SignExtImm] (2,7) 30hex Load Upper Imm. lui I R[rt] = {imm, 16’b0} fhex Load Word lw I R[rt] = M[R[rs]+SignExtImm] (2) 23hex Nor nor R R[rd] = ~ (R[rs] | R[rt]) 0 / 27hex Or or R R[rd] = R[rs] | R[rt] 0 / 25hex Or Immediate ori I R[rt] = R[rs] | ZeroExtImm (3) dhex Set Less Than slt R R[rd] = (R[rs] < R[rt]) ? 1 : 0 0 / 2ahex Set Less Than Imm. slti I R[rt] = (R[rs] < SignExtImm)? 1 : 0 (2) ahex Set Less Than Imm. Unsigned sltiu I R[rt] = (R[rs] < SignExtImm) ? 1 : 0 (2,6) bhex Set Less Than Unsig. sltu R R[rd] = (R[rs] < R[rt]) ? 1 : 0 (6) 0 / 2bhex Shift Left Logical sll R R[rd] = R[rt] << shamt 0 / 00hex Shift Right Logical srl R R[rd] = R[rt] > > shamt 0 / 02hex Store Byte sb I M[R[rs]+SignExtImm](7:0) = R[rt](7:0) (2) 28hex Store Conditional sc I M[R[rs]+SignExtImm] = R[rt]; R[rt] = (atomic) ? 1 : 0 (2,7) 38hex Store Halfword sh I M[R[rs]+SignExtImm](15:0) = R[rt](15:0) (2) 29hex Store Word sw I M[R[rs]+SignExtImm] = R[rt] (2) 2bhex Subtract sub R R[rd] = R[rs] - R[rt] (1) 0 / 22hex Subtract Unsigned subu R R[rd] = R[rs] - R[rt] 0 / 23hex (1) May cause overflow exception (2) SignExtImm = { 16{immediate[15]}, immediate } (3) ZeroExtImm = { 16{1b’0}, immediate } (5) JumpAddr = { PC+4[31:28], address, 2’b0 } (7) Atomic test&set pair; R[rt] = 1 if pair atomic, 0 if not atomic R opcode rs rt rd shamt funct 31 26 25 21 20 16 15 11 10 6 5 0 I opcode rs rt immediate 31 26 25 21 20 16 15 0 J opcode address 31 26 25 0 ARITHMETIC CORE INSTRUCTION SET OPCODE NAME, MNEMONIC FOR￾MAT OPERATION / FMT /FT / FUNCT (Hex) Branch On FP True bc1t FI if(FPcond)PC=PC+4+BranchAddr (4) 11/8/1/-- Branch On FP False bc1f FI if(!FPcond)PC=PC+4+BranchAddr(4) 11/8/0/-- Divide div R Lo=R[rs]/R[rt]; Hi=R[rs]%R[rt] 0/--/--/1a Divide Unsigned divu R Lo=R[rs]/R[rt]; Hi=R[rs]%R[rt] (6) 0/--/--/1b FP Add Single add.s FR F[fd ]= F[fs] + F[ft] 11/10/--/0 FP Add Double add.d FR {F[fd],F[fd+1]} = {F[fs],F[fs+1]} + {F[ft],F[ft+1]} 11/11/--/0 FP Compare Single c.x.s* FR FPcond = (F[fs] op F[ft]) ? 1 : 0 11/10/--/y FP Compare Double c.x.d* FR FPcond = ({F[fs],F[fs+1]} op {F[ft],F[ft+1]}) ? 1 : 0 11/11/--/y * (x is eq, lt, or le) (op is ==, <, or <=) ( y is 32, 3c, or 3e) FP Divide Single div.s FR F[fd] = F[fs] / F[ft] 11/10/--/3 FP Divide Double div.d FR {F[fd],F[fd+1]} = {F[fs],F[fs+1]} / {F[ft],F[ft+1]} 11/11/--/3 FP Multiply Single mul.s FR F[fd] = F[fs] * F[ft] 11/10/--/2 FP Multiply Double mul.d FR {F[fd],F[fd+1]} = {F[fs],F[fs+1]} * {F[ft],F[ft+1]} 11/11/--/2 FP Subtract Single sub.s FR F[fd]=F[fs] - F[ft] 11/10/--/1 FP Subtract Double sub.d FR {F[fd],F[fd+1]} = {F[fs],F[fs+1]} - {F[ft],F[ft+1]} 11/11/--/1 Load FP Single lwc1 I F[rt]=M[R[rs]+SignExtImm] (2) 31/--/--/-- Load FP Double ldc1 I F[rt]=M[R[rs]+SignExtImm]; (2) F[rt+1]=M[R[rs]+SignExtImm+4] 35/--/--/-- Move From Hi mfhi R R[rd] = Hi 0 /--/--/10 Move From Lo mflo R R[rd] = Lo 0 /--/--/12 Move From Control mfc0 R R[rd] = CR[rs] 10 /0/--/0 Multiply mult R {Hi,Lo} = R[rs] * R[rt] 0/--/--/18 Multiply Unsigned multu R {Hi,Lo} = R[rs] * R[rt] (6) 0/--/--/19 Shift Right Arith. sra R R[rd] = R[rt] >> shamt 0/--/--/3 Store FP Single swc1 I M[R[rs]+SignExtImm] = F[rt] (2) 39/--/--/-- Store FP Double sdc1 I M[R[rs]+SignExtImm] = F[rt]; (2) M[R[rs]+SignExtImm+4] = F[rt+1] 3d/--/--/-- FR opcode fmt ft fs fd funct 31 26 25 21 20 16 15 11 10 6 5 0 FI opcode fmt ft immediate 31 26 25 21 20 16 15 0 NAME MNEMONIC OPERATION Branch Less Than blt if(R[rs]<R[rt]) PC = Label Branch Greater Than bgt if(R[rs]>R[rt]) PC = Label Branch Less Than or Equal ble if(R[rs]<=R[rt]) PC = Label Branch Greater Than or Equal bge if(R[rs]>=R[rt]) PC = Label Load Immediate li R[rd] = immediate Move move R[rd] = R[rs] NAME NUMBER USE PRESERVED ACROSS A CALL? $zero 0 The Constant Value 0 N.A. $at 1 Assembler Temporary No $v0-$v1 2-3 Values for Function Results and Expression Evaluation No $a0-$a3 4-7 Arguments No $t0-$t7 8-15 Temporaries No $s0-$s7 16-23 Saved Temporaries Yes $t8-$t9 24-25 Temporaries No $k0-$k1 26-27 Reserved for OS Kernel No $gp 28 Global Pointer Yes $sp 29 Stack Pointer Yes $fp 30 Frame Pointer Yes $ra 31 Return Address Yes 1 2 MIPS Reference Data Card (“Green Card”) 1. Pull along perforation to separate card 2. Fold bottom side (columns 3 and 4) together FLOATING-POINT INSTRUCTION FORMATS PSEUDOINSTRUCTION SET Copyright 2009 by Elsevier, Inc., All rights reserved. From Patterson and Hennessy, Computer Organization and Design, 4th ed. (4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0 } (6) Operands considered unsigned numbers (vs. 2 s comp.) ’ >