that the Rm input is asynchronous to the clock signal,so make sure p Connect the LEDs register in that you can observe the output produced by th processo 6.Compile the eircuit and download it into the FPGA chip. 7.Test the functionality of your design by executing code from the RAM and observing the LEDs. PartIV In this part you are to connect an additional /module toyour circuit from Part II and write code that is executed alled seg7 scroll to uit This module should contain on display on the DE2 board Each register should directly drive themntorne that the processor can write characters onto these displays.Create the necessary address decoding to allow the processor to write to the registers in the seg7 scroll module 1.Create a Ouartus ll p and write the VHDL code that includes the cirumr 2.Use functional simuation to test the circuit te ti ct and write a mIf file that allow displays and then terminate,but a more interes scroll a word across the displavsinthg program could scroll a message across he 4.Test the functionality of your design by RAMand observing the-egment displays Part v the board The switch value and thess or to re iste toread thisesterby usngdnrutio.Youwill have toseressdecodngutipexerstohe processor to read from either the RAM or porr n units.according to the address used 1.Draw a ciruit diagram that shows how the is incorporated into the system 2.Create a Quartus II project for your circuit,write the VHDL code,and write a MIF file that demonstrate use of the portnmodule.One interesting application is to have the processor scroll a message across the 7 edsplays and use the values read from th porn module to change the speed at which the message 3.Test your circuit both by using functional simulation and by downloading it and executing your processor code on the DE2 board Suggested Bonus Parts The following are suggested bonus parts for this exercise. t.Modify the processor design 2.Extend the instructions suppor rted by your processor to make it more flexible.Some suggested instruction ND.O nstructions,and bran ch instruction may also wish tions other supported by the like 3.Write an Assembler program for your processor.It should automatically producesa MIF file from assembler code. Altera Corporation50-MHz speed requirement. Also note that the Run input is asynchronous to the clock signal, so make sure to synchronize this input using flip-flops. Connect the LEDs register in Figure 8 to LEDR15−0 so that you can observe the output produced by the processor. 6. Compile the circuit and download it into the FPGA chip. 7. Test the functionality of your design by executing code from the RAM and observing the LEDs. Part IV In this part you are to connect an additional I/O module to your circuit from Part III and write code that is executed by your processor. Add a module called seg7_scroll to your circuit. This module should contain one register for each 7-segment display on the DE2 board. Each register should directly drive the segment lights for one 7-segment display, so that the processor can write characters onto these displays. Create the necessary address decoding to allow the processor to write to the registers in the seg7_scroll module. 1. Create a Quartus II project for your circuit and write the VHDL code that includes the circuit from Figure 8 in addition to your seg7_scroll module. 2. Use functional simulation to test the circuit. 3. Add appropriate timing constraints and pin assignments to your project, and write a MIF file that allows the processor to write characters to the 7-segment displays. A simple program would write a word to the displays and then terminate, but a more interesting program could scroll a message across the displays, or scroll a word across the displays in the left, right, or both directions. 4. Test the functionality of your design by executing code from the RAM and observing the 7-segment displays. Part V Add to your circuit from Part IV another module, called port_n, that allows the processor to read the state of some switches on the board. The switch values should be stored into a register, and the processor should be able to read this register by using a ld instruction. You will have to use address decoding and multiplexers to allow the processor to read from either the RAM or port_n units, according to the address used. 1. Draw a circuit diagram that shows how the port_n unit is incorporated into the system. 2. Create a Quartus II project for your circuit, write the VHDL code, and write a MIF file that demonstrates use of the port_n module. One interesting application is to have the processor scroll a message across the 7- segment displays and use the values read from the port_n module to change the speed at which the message is scrolled. 3. Test your circuit both by using functional simulation and by downloading it and executing your processor code on the DE2 board. Suggested Bonus Parts The following are suggested bonus parts for this exercise. 1. Use the Quartus II tools to identify the critical paths in the processor circuit. Modify the processor design so that the circuit will operate at the highest clock frequency that you can achieve. 2. Extend the instructions supported by your processor to make it more flexible. Some suggested instruction types are logic instructions (AND, OR, etc), shift instructions, and branch instructions. You may also wish to add support for logical conditions other than “not zero” , as supported by mvnz, and the like. 3. Write an Assembler program for your processor. It should automatically produces a MIF file from assembler code. Copyright c 2006 Altera Corporation 4