Counters and pattern generators Up/down counters: generate a sequence of gradually increasing or decreasing counting patterns according to the clock and inputs (E.g. digital clock, 1, 2, 3, 4 Pattern generators: generate any patterns of finite states. Use state diagrams to design. ( E.g traffic light, red, green, yellow. VHDL 6. examples of FSM ver. 8aCounters and pattern generators • Up/down counters: generate a sequence of gradually increasing or decreasing counting patterns according to the clock and inputs. (E.g. digital clock, 1,2,3,4..) • Pattern generators: generate any patterns of finite states. Use state diagrams to design. (E.g. traffic light,red,green, yellow..) VHDL 6. examples of FSM ver.8a 2