SEQ Hardware (Review) Stages occur in sequence One operation in process memory at a time Fiqure 4.21 P293 Execute AL Write back Fetch memory increment Processor– 4 – Processor SEQ Hardware (Review) ◼ Stages occur in sequence ◼ One operation in process at a time Instruction memory PC increment CC ALU Data memory New PC rB dstE dstM ALU A ALU B Mem. control Addr srcA srcB read write ALU fun. Fetch Decode Execute Memory Write back data out Register file A B M E Register file A B M E Bch dstE dstM srcA srcB icode ifun rA PC valC valP valA valB Data valE valM PC newPC Figure 4.21 P293