Pulse Response Small Signal Non-Inverting Small Signaling Inverting s>E≌二 是=H TIME (0.2 us/DIV TIME(0. 2 us/DIV) 00564905 Large Signal Inverting 2295 TIME (2 us/DIV 0554907 Current Limit(RL= 10022 zHP> Application Hints These devices are op amps with an intemally trimmed input should be allowed to exceed the negative supply as this will offset voltage and JFET input devices(BI-FET Ii).These source and drain eliminating the need for clamps across the ding the negative common-mode limit on either input rce the output to a high state, potentially causing a inputs. Therefore, large differential input voltages can easily reversal of phase to the output. Exceeding the negative be accommodated without a large increase in input current. The maximum differential input voltage is independent of the common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occurPulse Response Small Signaling Inverting 00564904 Large Signal Inverting 00564906 Small Signal Non-Inverting 00564905 Large Signal Non-Inverting 00564907 Current Limit (RL = 100Ω) 00564908 Application Hints These devices are op amps with an internally trimmed input offset voltage and JFET input devices (BI-FET II). These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-mode limit on either input will force the output to a high state, potentially causing a reversal of phase to the output. Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur LF353 7 www.national.com