Table of Contents 1394 Open Host Controller Interface Specification/Release 1.1 Printed 1/10/00 Table of Contents PREFACE. .. Notice ...i Intellectual Property ...1 Information iii Promoters ..IV Contributors iv Table of Contents ...V List of Figures… ……xiii List ofTables .xVii 1.Introduction .1 1.1 Related documents..... .1 1.2 Overview... 1.2.1 Asynchronous functions. 1.2.2 Isochronous functions....... 1.2.3 Miscellaneous functions 2 1.3 Hardware description. .3 1.3.I Host bus interface..... .3 1.3.2DMA. 1.3.2.1 Asynchronous transmit DMA .4 1.3.2.2 Asynchronous receive DMA 5 1.3.2.3 Isochronous transmit DMA 1.3.2.4 Isochronous receive DMA -T 1.3.2.5 Self-ID receive DMA.......... .5 1.3.3 Global unique ID (GUID)interface... 1.3.4FIFOS. 5 6 1.3.4.1 Asynchronous transmit FIFOs 6 1.3.4.2 Isochronous transmit FIFO.... 1.3.4.3 Receive FIFOs....... 6 6 1.3.5Link… 6 1.4 Software interface overview.............. 8 1.4.I Registers. 8 1.4.2 DMA operation.. .8 1.4.3 Interrupts....... 8 1.5 1394 Open HCI Node Offset (Address)Map. .9 1.6 System Requirements............... .10 1.7Alignment .10 1.7.1 Data alignment........ .10 1.7.2 Memory structure and buffer alignment. ..10 2.Conventions-Notation and Terms............ .11 2.1 Notation… .11 2.1.1 Conformance glossary .11 2.1.2 Numeric Notation..... ,11 2.1.3 Bit Notation......... ,11 2.1.4 Register Notation......... .11 Copyright1996-2000 All rights reserved PagevCopyright © 1996-2000 All rights reserved. Page v Table of Contents 1394 Open Host Controller Interface Specification / Release 1.1 Printed 1/10/00 Table of Contents PREFACE ............................................................................................................................................................................ iii Notice .............................................................................................................................................................................. iii Intellectual Property ........................................................................................................................................................ iii Information ..................................................................................................................................................................... iii Promoters .................................................................................................................................................................iv Contributors .................................................................................................................................................................... iv Table of Contents .................................................................................................................................................................v List of Figures ................................................................................................................................................................... xiii List of Tables .....................................................................................................................................................................xvii 1. Introduction .......................................................................................................................................................................1 1.1 Related documents................................................................................................................................................1 1.2 Overview ..............................................................................................................................................................1 1.2.1 Asynchronous functions.............................................................................................................................1 1.2.2 Isochronous functions ................................................................................................................................1 1.2.3 Miscellaneous functions.............................................................................................................................2 1.3 Hardware description............................................................................................................................................3 1.3.1 Host bus interface.......................................................................................................................................3 1.3.2 DMA ..........................................................................................................................................................4 1.3.2.1 Asynchronous transmit DMA..........................................................................................................4 1.3.2.2 Asynchronous receive DMA ...........................................................................................................5 1.3.2.3 Isochronous transmit DMA .............................................................................................................5 1.3.2.4 Isochronous receive DMA ...............................................................................................................5 1.3.2.5 Self-ID receive DMA ......................................................................................................................5 1.3.3 Global unique ID (GUID) interface ...........................................................................................................5 1.3.4 FIFOs .........................................................................................................................................................6 1.3.4.1 Asynchronous transmit FIFOs.........................................................................................................6 1.3.4.2 Isochronous transmit FIFO..............................................................................................................6 1.3.4.3 Receive FIFOs .................................................................................................................................6 1.3.5 Link............................................................................................................................................................6 1.4 Software interface overview .................................................................................................................................8 1.4.1 Registers ....................................................................................................................................................8 1.4.2 DMA operation ..........................................................................................................................................8 1.4.3 Interrupts....................................................................................................................................................8 1.5 1394 Open HCI Node Offset (Address) Map........................................................................................................9 1.6 System Requirements .........................................................................................................................................10 1.7 Alignment ...........................................................................................................................................................10 1.7.1 Data alignment .........................................................................................................................................10 1.7.2 Memory structure and buffer alignment ...................................................................................................10 2. Conventions - Notation and Terms ...................................................................................................................................11 2.1 Notation ..............................................................................................................................................................11 2.1.1 Conformance glossary..............................................................................................................................11 2.1.2 Numeric Notation.....................................................................................................................................11 2.1.3 Bit Notation..............................................................................................................................................11 2.1.4 Register Notation .....................................................................................................................................11