例:4选1数据选择器 工工 BRARY工EEE; 库 USE IEEE STD LOGIC 1164.ALL 程序包 ENTITY ex2 IS 实体 PORT(i0,,12,i3, a,b: IN STD LOGIC; g: OUT STD LOGIC)i END ex2i ARCHITECTURE ex2 a oF ex2 IS 结构体 SIGNAL sel: STD LOGIC VECTOR (1 DOWNTO 0)i BEG工N sel<=bsa q<=立0 WHEN se1=N00″ELSE i1 When sel=o1 ElSE i2 WHEN sE1=110〃ELsE i3 WHEN sel=11〃ELsE x′; END ex2 ai例：4选1数据选择器 LIBRARY IEEE; --库 USE IEEE.STD_LOGIC_1164.ALL; --程序包 ENTITY ex2 IS --实体 PORT(i0,i1,i2,i3,a,b:IN STD_LOGIC; q:OUT STD_LOGIC); END ex2; ARCHITECTURE ex2_a OF ex2 IS --结构体 SIGNAL sel:STD_LOGIC_VECTOR(1 DOWNTO 0); BEGIN sel<=b&a; q<= i0 WHEN sel=“00” ELSE i1 WHEN sel=“01” ELSE i2 WHEN sel=“10” ELSE i3 WHEN sel=“11” ELSE ‘x’; END ex2_a;