AD820/AD822/AD824 INPUT INCLUDES NEGATIVE RAIL OP-282/OP-482 INCLUDES POSITIVE RAIL AD820AD822/AD824 oP282oP482 INPUTS MAY P-CHANNEL N-CHANNEL JFETS IFETS Y GO TO-V Figure 1.4 As shown in Figure 1.5, true rail-to-rail input stages require two long-tailed pairs, one of nPn bipolar transistors(or N-channel FETs), the other of PNP transistors (or p-channel FETs). These two pairs exhibit different offsets and bias currents, so when the applied input common-mode voltage changes, the amplifier input offset voltage and input bias current does also. In fact, when both current sources(ll and 12) remain active throughout the entire input common-mode range, amplifier input ffset voltage is the average offset voltage of the npn pair and the pnp pair. In those designs where the current sources are alternatively switched off at some point along the input common- mode voltage amplifier input offset voltage is dominated by the pnp pair offset voltage for signals near the negative supply, and by the npn pair offset voltage for signals near the positive supply Amplifier input bias current, a function of transistor current gain, is also a function of the applied input common-mode voltage. The result is relatively poor common mode rejection(CMR), and a changing common- mode input impedance over the common-mode input voltage range, compared to familiar dual supply precision devices like the OPO7 or OP97. These specifications should be considered carefully when choosing a rail- rail input op amp, especially for a non- inverting configuration Input offset voltage, input bias current, and even CMr may be quite good over part of the common-mode range, but much worse in the region where operation shifts between the npn and pnp devices6 AD820/AD822/AD824 INPUT INCLUDES NEGATIVE RAIL, OP-282/OP-482 INCLUDES POSITIVE RAIL Figure 1.4 As shown in Figure 1.5, true rail-to-rail input stages require two long-tailed pairs, one of NPN bipolar transistors (or N-channel FETs), the other of PNP transistors (or p-channel FETs). These two pairs exhibit different offsets and bias currents, so when the applied input common-mode voltage changes, the amplifier input offset voltage and input bias current does also. In fact, when both current sources (I1 and I2) remain active throughout the entire input common-mode range, amplifier input offset voltage is the average offset voltage of the NPN pair and the PNP pair. In those designs where the current sources are alternatively switched off at some point along the input common-mode voltage, amplifier input offset voltage is dominated by the PNP pair offset voltage for signals near the negative supply, and by the NPN pair offset voltage for signals near the positive supply. Amplifier input bias current, a function of transistor current gain, is also a function of the applied input common-mode voltage. The result is relatively poor common￾mode rejection (CMR), and a changing common-mode input impedance over the common-mode input voltage range, compared to familiar dual supply precision devices like the OP07 or OP97. These specifications should be considered carefully when choosing a rail-rail input op amp, especially for a non-inverting configuration. Input offset voltage, input bias current, and even CMR may be quite good over part of the common-mode range, but much worse in the region where operation shifts between the NPN and PNP devices