正在加载图片...
RAIL-TO-RAIL INPUT STAGE TOPOLOGY OS 12 Figure 1.5 Many rail-to-rail amplifier input stage designs switch operation from one differential pair to the other differential pair somew here along the input common- mode voltage range. Devices like the oPX91 family and the oP279 have a common-mode crossover threshold at approximately 1 v below the positive supply. In these devices the PNP differential input stage remains active; as a result, amplifier input offset g voltage, input bias current, CMR, input noise voltage/current are all determined by the characteristics of the PNp differential pair At the crossover threshold, however amplifier input offset voltage becomes the average offset voltage of the NPN/PNP pairs and can change rapidly. Also, amplifier bias currents, dominated by the PNP differential pair over most of the input common-mode range, change polarity and magnitude at the crossover threshold when the npn differential pair becomes ctive. As a result, source impedance levels should be balanced when using such devices, as mentioned before, to minimize input bias current offsets and distortion. An advantage to this type of rail-to-rail input stage design is that input stage transconductance can be made constant throughout the entire input common-mode voltage range, and the amplifier slews symmetrically for all applied signals Operational amplifiers, like the OP284/0P484, utilize a rail-to-rail input stage design where both PNP and nPn transistor pairs are active throughout the entire input common-mode voltage range, and there is no common-mode crossover threshold Amplifier input offset voltage is the average offset voltage of the npn and the PNp stages. Amplifier input offset voltage exhibits a smooth transition throughout the entire input common-mode voltage range because of careful laser-trimming of resistors in the input stage. In the same manner, through careful input stage current balancing and input transistor design, amplifier input bias currents also exhibit a smooth transition throughout the entire common-mode input voltage range. The exception occurs at the extremes of the input common-mode range7 RAIL-TO-RAIL INPUT STAGE TOPOLOGY Figure 1.5 Many rail-to-rail amplifier input stage designs switch operation from one differential pair to the other differential pair somewhere along the input common-mode voltage range. Devices like the OPX91 family and the OP279 have a common-mode crossover threshold at approximately 1V below the positive supply. In these devices, the PNP differential input stage remains active; as a result, amplifier input offset voltage, input bias current, CMR, input noise voltage/current are all determined by the characteristics of the PNP differential pair. At the crossover threshold, however, amplifier input offset voltage becomes the average offset voltage of the NPN/PNP pairs and can change rapidly. Also, amplifier bias currents, dominated by the PNP differential pair over most of the input common-mode range, change polarity and magnitude at the crossover threshold when the NPN differential pair becomes active. As a result, source impedance levels should be balanced when using such devices, as mentioned before, to minimize input bias current offsets and distortion. An advantage to this type of rail-to-rail input stage design is that input stage transconductance can be made constant throughout the entire input common-mode voltage range, and the amplifier slews symmetrically for all applied signals. Operational amplifiers, like the OP284/OP484, utilize a rail-to-rail input stage design where both PNP and NPN transistor pairs are active throughout the entire input common-mode voltage range, and there is no common-mode crossover threshold. Amplifier input offset voltage is the average offset voltage of the NPN and the PNP stages. Amplifier input offset voltage exhibits a smooth transition throughout the entire input common-mode voltage range because of careful laser-trimming of resistors in the input stage. In the same manner, through careful input stage current balancing and input transistor design, amplifier input bias currents also exhibit a smooth transition throughout the entire common-mode input voltage range. The exception occurs at the extremes of the input common-mode range
<<向上翻页向下翻页>>
©2008-现在 cucdc.com 高等教育资讯网 版权所有