both the clock edge for registers and as the write-enable for RAM parts. Thold for the RAM address and data lines is sometimes a problem with this strategy, however Synchronizer errors Whenever you clock a signal which is asynchronous with the clocking waveform, there is a probability of producing a meta-stable state in the clocked flip-flop. For low-frequency clocks the probability of this meta-stable behavior is low. For LS flip-flops, a flip-flop output will have either set or not set by about 200 ns after the clock edge with very high probability. If you are designing a system which depends on synchronizing external signals faster than this, consider using a 74AS74 flip-flop as the synchronizer, since it is much faster than the ls parts Testing Strategies You should be able to help yourself considerably in the testing of your project if you include in the design a means of controlling all of the finite-state machines. This means that you should be able to start the machine in a known state, preferably in any state, so that you can check out subroutines individually. You should be able to single step the machine to track down incorrect behavior. Making the machine loop at full speed doing some repetitive task is also a helpful debugging strategy, since you can then use a scope to examine the timing of the device directly Those of you working with tV monitors will find that the monitor itself is a good debugging tool Driving high current devices Those of you working with stepping motors and other high power devices should take care in the power/ground routing of motor power. The motor should be driven with a power supply other than the logic supply, and here, despite what I said above, you should worry about ground loops. Make the ground pin of the driver parts the common point for the motor and logic grounds, and otherwise strictly segregate them You should use power diodes as flyback protection across your motor windings. A IN4001 would do nicelyboth the clock edge for registers and as the write-enable for RAM parts. Thold for the RAM address and data lines is sometimes a problem with this strategy, however. Synchronizer Errors Whenever you clock a signal which is asynchronous with the clocking waveform, there is a probability of producing a meta-stable state in the clocked flip-flop. For low-frequency clocks the probability of this meta-stable behavior is low. For LS flip-flops, a flip-flop output will have either set or not set by about 200 ns after the clock edge with very high probability. If you are designing a system which depends on synchronizing external signals faster than this, consider using a 74AS74 flip-flop as the synchronizer, since it is much faster than the LS parts. Testing Strategies You should be able to help yourself considerably in the testing of your project if you include in the design a means of controlling all of the finite-state machines. This means that you should be able to start the machine in a known state, preferably in any state, so that you can check out subroutines individually. You should be able to single step the machine to track down incorrect behavior. Making the machine loop at full speed doing some repetitive task is also a helpful debugging strategy, since you can then use a scope to examine the timing of the device directly. Those of you working with TV monitors will find that the monitor itself is a good debugging tool. Driving High Current Devices Those of you working with stepping motors and other high power devices should take care in the power/ground routing of motor power. The motor should be driven with a power supply other than the logic supply, and here, despite what I said above, you should worry about ground loops. Make the ground pin of the driver parts the common point for the motor and logic grounds, and otherwise strictly segregate them. You should use power diodes as flyback protection across your motor windings. A 1N4001 would do nicely