5.1软硬件通信的基本方式 直接存储器存取(DMA)方式 A typical DMA operation S5:The DMA device performs the transfer from the source to destination address. During these transfers,the processor monitors the addresses on the bus and checks if any location modified during DMA operations is cached in the processor.If the processor detects a cached address on the bus,it can take one of the two actions: o S5.1:Processor invalidates the internal cache entry for the address involved in DMA write operation S5.2:Processor updates the internal cache when a DMA write is detectedA typical DMA operation S5: The DMA device performs the transfer from the source to destination address. During these transfers, the processor monitors the addresses on the bus and checks if any location modified during DMA operations is cached in the processor. If the processor detects a cached address on the bus, it can take one of the two actions:  S5.1: Processor invalidates the internal cache entry for the address involved in DMA write operation  S5.2: Processor updates the internal cache when a DMA write is detected 直接存储器存取（DMA）方式 5.1 软硬件通信的基本方式