文件说明— netlist&*.lib ● Verilog Netlist(v) 综合后生成的门级网表 o Timing Library files(lib) Max Timing Libraries: for setup time check v Min Timing Libraries: for hold time check Institute of Microelectronics, Peking University 集成电路设计实习一单元实验四 Copyright O 2011-2012 数字系统设计Institute of Microelectronics, Peking University Copyright © 2011-2012 集成电路设计实习－单元实验四 数字系统设计 Page 6 文件说明——netlist.v & *.lib  Verilog Netlist (.v)  综合后生成的门级网表  Timing Library files(.lib)  Max Timing Libraries: for setup time check  Min Timing Libraries: for hold time check