易建助编著《计算机维修技术第2版》 附件3-6：DDR2内存引脚信号 presence-detect portion of the module. 分 RESET# Input Asynchronously forces all registered outputs LOW when RESET#is LOW.This signal can be used during power up to ensure that CKE is LOW and DQs are High-Z. 53,59,64,67,69,172,178,184,187,189, VDD Supply Power Supply:1.8V +0.IV. 197, 51,56,62,72,75,78,170,175181,191, VDDQ Supply DQ Power Supply:1.8V 40.1V. 194, 1 VREF Supply SSTL 18 reference voltage. 2,58,11,14,17,20,23,2629,32,35, VSS Supply Ground. 38,41,44,47,50,65,66,79,82,85,88, 91,94,97,100,103,106,109,112,115,118, 121,124,127,130,133,136,139,142, 145,148,151,154,157,160,163,166 169,198,201,204,207,210,213,216, 219,222,225,228,231,234,237 238 VDDSPD Supply Serial EEPROM positive power supply:+1.7V to+3.6V. 19,54(512MB,1GB,76,77,102,171, NC No Connect:These pins should be left unconnected. 196(512MB),173,174, 137,138,220,221 RFU Reserved for future use.易建勋 编著《计算机维修技术 第 2 版》 附件 3-6：DDR2 内存引脚信号 presence-detect portion of the module. 18 RESET# Input Asynchronously forces all registered outputs LOW when RESET# is LOW. This signal can be used during power up to ensure that CKE is LOW and DQs are High-Z. 53, 59, 64, 67, 69, 172, 178, 184, 187, 189, 197, VDD Supply Power Supply: 1.8V ±0.1V. 51, 56, 62, 72, 75, 78, 170, 175, 181, 191, 194, VDDQ Supply DQ Power Supply: 1.8V ±0.1V. 1 VREF Supply SSTL_18 reference voltage. 2, 5, 8, 11, 14, 17, 20, 23, 26, 29, 32, 35, 38, 41, 44, 47, 50, 65, 66, 79, 82, 85, 88, 91, 94, 97,100, 103, 106, 109,112, 115, 118, 121, 124, 127, 130, 133, 136, 139, 142, 145, 148, 151, 154, 157, 160, 163, 166, 169, 198, 201, 204, 207, 210, 213, 216, 219, 222, 225, 228, 231, 234, 237 VSS Supply Ground. 238 VDDSPD Supply Serial EEPROM positive power supply: +1.7V to +3.6V. 19, 54 (512MB, 1GB), 76, 77, 102, 171, 196 (512MB), 173, 174, NC — No Connect: These pins should be left unconnected. 137, 138, 220, 221 RFU — Reserved for future use