7.2 systolic array design methodology /986 Systolic architectures are designed by using linear mapping techniques on regular dependence graphs(DG). Regular Dependence Graph:The presence of an edge in a certain direction at any node in the dG represents presence of an edge in the same direction at all nodes in the DG. ■DG corresponds to space representation→no time instance is assigned to any computation,- t=0. 2021年2月 32021年2月 3 7.2 systolic array design methodology  Systolic architectures are designed by using linear mapping techniques on regular dependence graphs (DG).  Regular Dependence Graph: The presence of an edge in a certain direction at any node in the DG represents presence of an edge in the same direction at all nodes in the DG.  DG corresponds to space representation → no time instance is assigned to any computation, → t=0