ogio g OH(min) VIH(min Disallow- Indeter- Logic C O FIGURE 79.4 Switching device logic levels TABLE 79. 3 ignal Voltage Parameters for Selected Logic Subfamilies(in 2.0 0.5 74ASxX 0.4 2.0 74FXX 74HCxx 0.1 74HCTxX 0.1 2.0 8888983 74ACxx 0.4 74ACTxx 0.4 74AHCxx 0.1 3.85 74AHCTX 3.65 0.96 1.65 1.105 1.475 10Hxx 148 on switching a fixed amount of bias current that is less than the saturation amount between two different transistors. The basic circuit found in the ECl family is the differential amplifier. One side of the differential amplifier is controlled by a bias circuit and the other is controlled by the logic inputs to the gate. This logic family is also referred to as current-mode logic( CML) because of its current switching operation Logic Family Circuit Parameters Digital circuits and systems operate with only two states, logic I and 0, usually represented by two different voltage levels, a high and a low. The two logic levels actually consist of a range of values with the numerical quantities dependent upon the specific family that is used. Minimum high logic levels and maximum low logic levels are established by specifications for each family. Minimum device output levels for a logic high are called VOH(min) and minimum input levels are called VIH(min). The abbreviations for maximum output and input low logic levels are VoLmax) and VIL(max), respectively. Figure 79.4 shows the relationships between these parameters Logic voltage level parameters are illustrated for selected prominent logic subfamilies in Table 79.3. As seen in this illustration, there are many operational incompatibilities between major logic family types. Noise margin is a quantitative measure of a device's noise immunity. High-level noise margin( VNH)and low-level noise margin( VNL)are defined in Eqs. (79.1)and(79.2). e 2000 by CRC Press LLC© 2000 by CRC Press LLC on switching a fixed amount of bias current that is less than the saturation amount between two different transistors. The basic circuit found in the ECL family is the differential amplifier. One side of the differential amplifier is controlled by a bias circuit and the other is controlled by the logic inputs to the gate. This logic family is also referred to as current-mode logic (CML) because of its current switching operation. Logic Family Circuit Parameters Digital circuits and systems operate with only two states, logic 1 and 0, usually represented by two different voltage levels, a high and a low. The two logic levels actually consist of a range of values with the numerical quantities dependent upon the specific family that is used. Minimum high logic levels and maximum low logic levels are established by specifications for each family. Minimum device output levels for a logic high are called VOH(min) and minimum input levels are called VIH(min). The abbreviations for maximum output and input low logic levels are VOL(max) and VIL(max), respectively. Figure 79.4 shows the relationships between these parameters. Logic voltage level parameters are illustrated for selected prominent logic subfamilies in Table 79.3. As seen in this illustration, there are many operational incompatibilities between major logic family types. Noise margin is a quantitative measure of a device’s noise immunity. High-level noise margin (VNH) and low-level noise margin (VNL) are defined in Eqs. (79.1) and (79.2). FIGURE 79.4 Switching device logic levels. TABLE 79.3 Logic Signal Voltage Parameters for Selected Logic Subfamilies (in Volts) Subfamily VOH(min) VOL(max) VIH(min) VIL(max) 74xx 2.4 0.4 2.0 0.8 74LSxx 2.7 0.5 2.0 0.8 74ASxx 2.5 0.5 2.0 0.8 74ALSxx 2.5 0.4 2.0 0.8 74Fxx 2.5 0.5 2.0 0.8 74HCxx 4.9 0.1 3.15 0.9 74HCTxx 4.9 0.1 2.0 0.8 74ACxx 3.8 0.4 3.15 1.35 74ACTxx 3.8 0.4 2.0 0.8 74AHCxx 4.5 0.1 3.85 1.65 74AHCTxx 3.65 0.1 2.0 0.8 10xxx –0.96 –1.65 –1.105 –1.475 10Hxxx –0.98 –1.63 –1.13 –1.48