第1期 邬蓉等：一个1.5V低相位噪声的高频率LC压控振荡器的设计 171 -40T 4.6 -60 -00000 44 00011 -80 4.2 -00111 -01111 11111 -100 4.0 -117 dBc/Hz 2-120 -122 dBc/Hz 3.8 3.6 -140 3.4 -160 3.2 10 10 10s 105 lor 0 0.51.01.52.02.53.0 f/Rz U/V (a)压控振满器的相位噪声特性 (b)压控振荡器的调谐特性曲线 图9LC压控振荡器仿真结果 Fig.9 Simulation results of LC VCO 表1与国外文献的VC0噪声性能比较 Tab.1 Comparison of noise performance with foreign counterparts 来源 Tech. fo G Nphax/(dBc) Voo/V l∥m4 FOM Heg☑[4] BiCMOS 1 ·152@3M 2.5 3.65 -194.86 本文 0.35mM0S 3.6 .117@600Kb 1.5 6 -183.02 Hajimiri(8] 0.25 WmCMOS 1.8 ·121@600K业 1.5 -182.76 Bunch[9] 0.35 HmCMOS 2.5 ·.117@600K业 3 -173.85 Liuf10] 0.35 UmCMOS 6.0 ·98.4@1M也 1.5 12 -161.41 本文重点分析和比较了三种降低相位噪声方法的原理，并进行了仿真验证，在实际的电路设计中，采 用电感电容滤波技术降低相位噪声，并对器件尺寸参数的选择进行了优化.这对于LC压控振荡器的设计 是具有一定参考价值的 参考文献： [1]李天望，曾晓军，洪志良.1V2.5G业压控振荡器的设计U].半导体学报200324(1)：8083 [2]陈钰，洪志良，朱江.采用0.25 m CMOS工艺适用于LDVS驱动器的高性能多项时钟生成器的设计 [U].半导体学报，200122(8)：10691074 [3]Fong N,Pouchart J.Design of wide band CMOS VCO for multiband wireless LAN applications [J].IEEE Joumal Solid-State Circuit,2003,38(8):1333-1342. [4]Hegazi E,Sioland H,Abidi A.A filtering technique to lower oscillator phase noise [J].IEEEJoumal f Solid-State Gcmt,2001,36(12):1921-1929. [5]Andreani P.Tail current moise suppression in RF CMOS VCO [J].IEEEJournal SalidState Circuit.2002,37(3): 342348. [6]Bram D M.CMOS fractiona-N synthesizers design for high spectral purity and monolithic integration [M].The Nether lands:Kuwer Academic Publishers,2003 [7]Pietro Andreani.A 1.8 Gz CMOS VCO with reduced phase noise [EB/].http:/Aw.oersted.dtu.dk/personal/ pa/pdfArt/vooL2.pd,200r001/20040420. [8]Hajimiri A,Lee T H.Design issues in CMOS differential LC oscillators [J].IEEE Joumal of Solid-State Cir cuits, 1995-2005 Tsinghua Tongfang Optical Disc Co..Ltd.All rights reserved.图 9 LC压控振荡器仿真结果 Fig. 9 Simulation results of LC VCO 表 1 与国外文献的 VCO 噪声性能比较 Tab. 1 Comparison of noise performance with foreign counterparts 来源 Tech. f 0/ GHz Nphase/ (dBc·Hz - 1) VDD/ V I/ mA FOM Hegazi[4] BiCMOS 1 - 152 @ 3 MHz 2. 5 3. 65 - 194. 86 本文 0. 35μmCMOS 3. 6 - 117 @ 600 KHz 1. 5 6 - 183. 02 Hajimiri[8] 0. 25μmCMOS 1. 8 - 121 @ 600 KHz 1. 5 4 - 182. 76 Bunch[9 ] 0. 35μmCMOS 2. 5 - 117 @ 600 KHz 3 12 - 173. 85 Liu[10] 0. 35μmCMOS 6. 0 - 98. 4 @ 1 MHz 1. 5 12 - 161. 41 本文重点分析和比较了三种降低相位噪声方法的原理 ,并进行了仿真验证 ,在实际的电路设计中 ,采 用电感电容滤波技术降低相位噪声 ,并对器件尺寸参数的选择进行了优化. 这对于 LC 压控振荡器的设计 是具有一定参考价值的. 参考文献 : [1 ] 李天望 ,曾晓军 ,洪志良. 1 V 2. 5 GHz 压控振荡器的设计 [J ]. 半导体学报 ,2003 ,24 (1) :80283. [2 ] 陈 钰 ,洪志良 ,朱 江. 采用 0. 25μm CMOS工艺、适用于 LDVS驱动器的高性能多项时钟生成器的设计 [J ]. 半导体学报 ,2001 ,22 (8) :106921074. [3 ] Fong N , Plouchart J . Design of wide2band CMOS VCO for multiband wireless LAN applications [J ]. IEEE Journal of Solid2State Circuit , 2003 , 38 (8) :133321342. [4 ] Hegazi E , Sjoland H , Abidi A. A filtering technique to lower oscillator phase noise [J ]. IEEE Journal of Solid2State Circuit , 2001 , 36 (12) :192121929. [5 ] Andreani P. Tail current noise suppression in RF CMOS VCO [J ]. IEEE Journal of Solid2State Circuit , 2002 , 37 (3) : 3422348. [6 ] Bram D M. CMOSfractional2N synthesizers design for high spectral purity and monolithic integration [M]. The Nether2 lands : Kluwer Academic Publishers , 2003. [7 ] Pietro Andreani. A 1. 8 GHz CMOS VCO with reduced phase noise [ EB/ OL ]. http :∥www. oersted. dtu. dk/ personal/ pa/ pdfArt/ vcoL2. pdf , 2001207201/ 2004204220. [8 ] Hajimiri A , Lee T H. Design issues in CMOS differential LC oscillators [J ]. IEEE Journal of Solid2State Cir2cuits , 第 1 期 邬 蓉等 :一个 1. 5V 低相位噪声的高频率 LC压控振荡器的设计 171 © 1995-2005 Tsinghua Tongfang Optical Disc Co., Ltd. All rights reserved