 导言  跨阻放大器的并联-并联反馈  电流放大器的并联-串联反馈  低噪声和高频的跨阻放大器

 定义：HD, IM, 交调点  MOS管的非线性 单端放大器 差分放大器  双极型晶体管的非线性  负反馈能够减小非线性  运算放大器的非线性  其他非线性和准则

 噪声定义  共源放大器的噪声  源极跟随器的噪声  共栅放大器的噪声  电流镜的噪声  差分对的噪声  密勒CMOS OTA的噪声  容性噪声匹配  电压/电流检测器的噪声对比

 运算放大器的使用  两级运放的稳定性  极点分离  正零点的补偿  三级运放的稳定性

Digital Signal Processing • Signal & System • DSP system • Description for DSP FIR Filter Design & Implement • Digital Filter • Specification Design • Hardware Implementation Some Examples • Digital Down Converter • Central Processing Unit

Verilog for Verification • Testbench anatomy • Behavioral modeling for Testbench • Some examples Timing specification • Delay model • Timing verification • Pipeline technology Design For Test (DFT) Test vs. Verification Build In Self Test (BIST) Scan and Boundary Scan

 电流镜  差分对  差分电压放大器和差分电流放大器

 共源放大器  源极跟随器  共栅放大器

FPGA Design Method Design flow & tools Deign Model of Verilog HDL Design style of Verilog HDL Design Examples • RTL level design • Components of Datapath • Components of Controller

Verilog for Verification • Testbench anatomy • Behavioral modeling for Testbench • Some examples Timing specification • Delay model • Timing verification • Pipeline technology Design For Test (DFT) Test vs. Verification Build In Self Test (BIST) Scan and Boundary Scan