VHDL 的构造体基本结构 p.271 表 4-28 architecture arch_name of entity_name is declarations and definitions; 说明部分 begin concurrent statement; 语句部分 end arch_name; 构造体语法要点:
Very high speed integrated circuit Hardware Description Language (VHDL) – is an industry standard hardware description language – description the hardware in language instead of graphic
Behavior Modeling Only the functionality of the circuit, no structure No specific hardware intent For the purpose of synthesis, as well as simulation IN1,…,INn IF in1 THEN OUT1,…,OUTn FOR j IN high DOWNTO low LOOP