Topic 5Main contentsLast lecture reviewBoost Converter
Main contents • Last lecture review • Boost Converter Topic 5
1.1 Voltage and Current in Steady State In case of an inductor operating under asteady-state condition:i(t+T)=i(t)iLLCi+TV,dE= 0ULSubcircuit 2Subcircuit 1>Volt-seconds over T(a)equal zero.iULti+TVrdE= 00T>Averageinductorti+Tt1(b)voltage over T equalFigure 3-8Inductor response in steady statezero
➢Volt-seconds over T equal zero. t +T t L 1 1 v d = 0 steady-state condition: ➢Average inductor voltage over T equal zero. t +T t L T 1 1 1 v d = 0 iL (t +T) = iL (t) 1.1 Voltage and Current in Steady State ① In case of an inductor operating under a
)Incaseof acapacitoroperating underasteady-state condition: v.(t + T) = v.(t)Cti+7ieSubcircuit 1Subcircuit2C(a)>Amp-seconds over 7equalzero.+idE=00ti+T>Averagecapacitorcurrentover T equal(b)Figure 3-9Capacitor response in steady statezero
➢Amp-seconds over T equal zero. t +T t c 1 1 i d =0 ➢Average capacitor current over T equal zero. t +T t c T 1 1 1 i d =0 ② In case of a capacitor operating under a steady-state condition: vc (t +T) = vc (t)
(3)PowerandCurrent+Subcircuit2Subcircuit1UFigure 3-1 Instantaneous power flowp(t) =viInstantaneouspowerPvidt(t)dtAveragePoweravJodi（有效值电流)rms Current
(3) Power and Current Instantaneous power rms Current （有效值电流） Average Power p(t) = vi av T P 0 T 1 T p(t)dt = vidt 0 = 1 T T I = i dt 0 1 2 T
1. 2 Topology of Buck ConverterSeries pass regulator:transistoroperates inactive region110A50V1+linearamplifierVreVRand basedrivern=50%5250V100VPlos500WPin1000wP=500WDSwitching converter888口10AVV50V>大Rn>95%100Vw=500WPin-500WPliosr smallD
1. 2 Topology of Buck Converter R =50% >95%
1.3 Operating principle of Buck ConverterChargephase9RidV.DM6伟书=Lt=0
1.3 Operating principle of Buck Converter Chargephase
DischargephaseDM节Key note:-LIn steady state, the inductorcurrent will resume at theendof each cycle!t=0
Dischargephase Key note: In steady state, the inductor current will resume at the end of each cycle!
1.4 PWM control for Buck ConverterV。(desired)UcontrolAmplifierSwitchComparatorcontrolV(actual)(a)BlockdiagramsignalRepetitivewavetormUat=SawtoothvoltageUcontrol(amplified error)T(b)ComparatorsignalsUcontrol>UstOnorSwitchcontrolsignalOffOffPulseWidthModulationVcontrol<Ust(PWM)(switchingfrequencyf,=E-ma
E- 1.4 PWM control for Buck Converter PoPowwerer ElecElecttronronicicss mail: xjhuang@bjtu.edu.cn Pulse Width Modulation (PWM) (b) Comparator signals (a) Block diagram
2.1 Buck converter0SimplifyingAssumptions么1. Transistors, diodes and33Lotherpassive+T+ VL :Voi木components are all idealR12Va2. The input is a pure dcvoltage Vd.(a)3. The output voltage isVpurely dc without anyripple（纹波）, that isV.(t) =V。4. Continuous conductionmode，CcM（连续导电(b)模式)
0 Simplifying Assumptions 1.Transistors, diodes and other passive components are all ideal. 2. The input is a pure dc voltage Vd . 3. The output voltage is purely dc without any ripple（纹波）, that is o o v (t) ≈V , 4. Continuous conduction mode, CCM（连续导电 模式） voi Vd O t on t t o ff S T 1 = f s (b) + Vd - C R + vo=Vo - + voi - (a) L + vL - i d iL i o Vo 2.1 Buck converter
VbeILfmaxiufChargephase10LfmaOR,IifmaxILfmin'V1-LfmaxiDIyminEVin-VVLDischargephaseVRuicsVo102ofTOn
Charge phase Dischargephase