Typical EDA Tools for Altera FPGA Design Design Entry/RTL Coding Design Spec. Behavioral or Structural Description QUARTUS RTL Simulation (Quartus ll or ModelSim@) -Functional Simulation Verify Logic Model (No Timing Delays) QUARTUs-May Require Design Edits LEONARD O Synthesis(Quartus ll,Leonardo Spectrum,Synplify,etc.) Translate Design into Target Technology Primitives -Optimization to Meet Required Area Performance Constraints QUARTUS Place Route (Quartus ll) Map Primitives to Specific Locations Inside Target Technology Specify Routing Resources to Be Used QUARTUS May Require Design Edits 2021/1/13 ASIC Design,by Yan BoASIC Design, by Yan Bo Synthesis (Quartus II, Leonardo Spectrum, Synplify, etc.) - Translate Design into Target Technology Primitives - Optimization to Meet Required Area & Performance Constraints Design Spec. Place & Route (Quartus II) - Map Primitives to Specific Locations - Inside Target Technology - Specify Routing Resources to Be Used - May Require Design Edits Design Entry/RTL Coding - Behavioral or Structural Description RTL Simulation (Quartus II or ModelSim®) - Functional Simulation - Verify Logic Model (No Timing Delays) - May Require Design Edits Typical EDA Tools for Altera FPGA Design 2021/1/13 9