方法三:使用上升沿检测函数 LIBRARY IEEE: 上升沿 USE IEEESTD LOGIC 1164.ALL; ENTITY D reg Is PORTOD, CP: IN STD LOGIC; Q: OUT STD LOGIC) END D reg D触发器描述 ARCHITECTURE test OF D reg Is BEGIN PROCESS(P) BEGIN IF(rising edge(cp))THEN Q<=D END IF. END PROCESS END test:方法三：使用上升沿检测函数 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY D_reg IS PORT(D,CP:IN STD_LOGIC; Q:OUT STD_LOGIC); END D_reg; ARCHITECTURE test OF D_reg IS BEGIN PROCESS(cp) BEGIN IF (rising_edge(cp)) THEN Q<=D; END IF; END PROCESS; END test; 上升沿D触发器描述