IEEE 2009 Custom Intergrated Circuits Conference(CICC) A Sub-0.75RMs-Phase-Error Differentially-Tuned Fractional-N Synthesizer with On-Chip LDO Regulator and Analog-Enhanced AFC Technique Lei Lu,Lingbu Meng,Liang Zou,Hao Min and Zhangwen Tang ASIC System State Key Laboratory,Fudan University,Shanghai 201203,China Abstract-This paper presents a low-phase-error wideband (s) Koo=△fsJ△V fractional-N frequency synthesizer.Differential tuning is Charge 00p described and a level shift circuit is proposed to obtain Pump symmetrical tuning range.On-chip LDO regulator is designed to VCO improve the power supply rejection for VCO.A voltage monitor is used to enhance the digital AFC technique to overcome the Divide temperature variation.The synthesizer was implemented in a 0.18-um CMOS process with a 16-mA supply current and a lcpZF(S)K.co 1.47-mm2 die area.The measured in-band phase noise is less than open-loop gain三 -97 dBe/Hz at a 10-kHz frequency offset and the integrated phase (a) error is less than 0.75gMs.The measured reference spur is less than-71 dBe and the locking time is smaller than 20 us. 0.5le ZF(s) Loop Kico-Afc/A(VEp-Ven) I.INTRODUCTION Charge Filter Pump Fractional-N frequency synthesizers with wide tuning Loop range are essential for digital TV tuners.To meet the Filter 0.5/ requirements of the tuners,synthesizer should also have low ZF(s) phase noise,low phase error,constant loop bandwidth as well as automatic frequency calibration(AFC)techniques [1]. For the synthesizer loops,either single-ended or differen- DSM gain= [0.5/cp-(-0.5/p)]ZH(s)K.c tial architectures can be adopted.Fig.I shows the block 2TN diagram of a typical A fractional-N frequency synthesizer. (b) The differences in circuit blocks between single-ended and differential configurations are that differential charge pumps Fig.1.Block diagram of a typical AS fractional-N frequency synthesizer.(a) Single-ended configuration.(b)Differentially-tuned configuration. with common-mode feedback,two loop filters and differentially-uned VCOs are used in the latter.To obtain the lead to current mismatch in most cases when common-mode same loop characteristics as the single-ended form,half the voltage is not Vpp/2.This paper proposes a level shift circuit to charge pump current lep should be assigned to each side in the acquire a symmetrical tuning range using symmetrical differential form.Besides that,twice area of the loop filter and inversion mode MOS varactors(I-MOS).A low-noise high differentially-tuned varactors in LC VCO are needed. power-supply-rejection(PSR)low-dropout (LDO)regulator is Compared with the single-ended form,the differential form designed to bias VCO power supply.Due to the temperature has other advantages.The loop filter area can be reduced to a drift,the frequency variation may exceed 30 MHz for the half when two big capacitors in series are combined into one. multi-band VCO of this synthesizer,so a voltage monitor is Differential tuning characteristics can suppress the common- adopted to guarantee the robustness of the AFC technique. mode noise from power supply,substrate and control lines. Differential charge pump can obtain better linearity,which II.SYNTHESIZER ARCHITECTURE may effectively avoid the degradation of in-band phase noise The detail block diagram of the presented 1.2-2.1-GHz generated from quantization noise of A modulator going differentially-tuned A fractional-N frequency synthesizer is through analog blocks with large nonlinearity. shown in Fig.2.The big capacitor Cl is reduced to a half To achieve a symmetrical tuning range in the differential compared with the single-ended form and the loop filter is form,the common-mode voltage of VCO outputs is sensed to fully integrated.The phase-frequency detector (PFD)uses a decide the common-mode voltage of charge pump differential conventional tri-state deadzone free circuit.The charge pump outputs [2].However,non-symmetrical accumulation mode has rail-to-rail outputs and common-mode feedback with MOS varactors(A-MOS)are used.In addition,the common- excellent current match.Level shift circuits are added before mode voltage of charge pump outputs also varies,which may the control voltages of the VCO to compensate the difference between common-mode of charge pump outputs and VCO Corresponding author.Email:zwtang@fudan.edu.cn. outputs as well as the threshold voltage of the I-MOS varactors. 978-1-4244-4072-6/09/S25.00©20091EEE 5-41 53A Sub-0.75°RMS-Phase-Error Differentially-Tuned Fractional-N Synthesizer with On-Chip LDO Regulator and Analog-Enhanced AFC Technique Lei Lu, Lingbu Meng, Liang Zou, Hao Min and Zhangwen Tang* ASIC & System State Key Laboratory, Fudan University, Shanghai 201203, China Abstract—This paper presents a low-phase-error wideband fractional-N frequency synthesizer. Differential tuning is described and a level shift circuit is proposed to obtain symmetrical tuning range. On-chip LDO regulator is designed to improve the power supply rejection for VCO. A voltage monitor is used to enhance the digital AFC technique to overcome the temperature variation. The synthesizer was implemented in a 0.18-μm CMOS process with a 16-mA supply current and a 1.47-mm2 die area. The measured in-band phase noise is less than –97 dBc/Hz at a 10-kHz frequency offset and the integrated phase error is less than 0.75°RMS. The measured reference spur is less than –71 dBc and the locking time is smaller than 20 μs. I. INTRODUCTION Fractional-N frequency synthesizers with wide tuning range are essential for digital TV tuners. To meet the requirements of the tuners, synthesizer should also have low phase noise, low phase error, constant loop bandwidth as well as automatic frequency calibration (AFC) techniques [1]. For the synthesizer loops, either single-ended or differen￾tial architectures can be adopted. Fig. 1 shows the block diagram of a typical ΔΣ fractional-N frequency synthesizer. The differences in circuit blocks between single-ended and differential configurations are that differential charge pumps with common-mode feedback, two loop filters and differentially-uned VCOs are used in the latter. To obtain the same loop characteristics as the single-ended form, half the charge pump current Icp should be assigned to each side in the differential form. Besides that, twice area of the loop filter and differentially-tuned varactors in LC VCO are needed. Compared with the single-ended form, the differential form has other advantages. The loop filter area can be reduced to a half when two big capacitors in series are combined into one. Differential tuning characteristics can suppress the common￾mode noise from power supply, substrate and control lines. Differential charge pump can obtain better linearity, which may effectively avoid the degradation of in-band phase noise generated from quantization noise of ΔΣ modulator going through analog blocks with large nonlinearity. To achieve a symmetrical tuning range in the differential form, the common-mode voltage of VCO outputs is sensed to decide the common-mode voltage of charge pump differential outputs [2]. However, non-symmetrical accumulation mode MOS varactors (A-MOS) are used. In addition, the common￾mode voltage of charge pump outputs also varies, which may * Corresponding author. Email: zwtang@fudan.edu.cn. lead to current mismatch in most cases when common-mode voltage is not VDD/2. This paper proposes a level shift circuit to acquire a symmetrical tuning range using symmetrical inversion mode MOS varactors (I-MOS). A low-noise high power-supply-rejection (PSR) low-dropout (LDO) regulator is designed to bias VCO power supply. Due to the temperature drift, the frequency variation may exceed 30 MHz for the multi-band VCO of this synthesizer, so a voltage monitor is adopted to guarantee the robustness of the AFC technique. II. SYNTHESIZER ARCHITECTURE The detail block diagram of the presented 1.2–2.1-GHz differentially-tuned ΔΣ fractional-N frequency synthesizer is shown in Fig. 2. The big capacitor C1 is reduced to a half compared with the single-ended form and the loop filter is fully integrated. The phase-frequency detector (PFD) uses a conventional tri-state deadzone free circuit. The charge pump has rail-to-rail outputs and common-mode feedback with excellent current match. Level shift circuits are added before the control voltages of the VCO to compensate the difference between common-mode of charge pump outputs and VCO outputs as well as the threshold voltage of the I-MOS varactors. (a) (b) Fig. 1. Block diagram of a typical ΔΣ fractional-N frequency synthesizer. (a) Single-ended configuration. (b) Differentially-tuned configuration. 53 IEEE 2009 Custom Intergrated Circuits Conference (CICC) 978-1-4244-4072-6/09/$25.00 ©2009 IEEE 5-4-1