研究生课程教学大纲 Chapter2 Challenges faced by CMOS devices reduced to nano size(hours:12) (1)Limitation of size reduction (0.5h) (2)Challenge of size reduction to process technology (0.5h) (3)Problems of thin gate oxide (2h) (4)Polysilicon depletion effect (Ih) (5)Influence of quantum effect (Ih) (6)Mobility degradation and velocity saturation (2h) (7)Influence of impurity random distribution (Ih) (8)Limit of threshold voltage reduction (2h) (9)Influence of source drain series resistance (2h) This chapter describes a series of problems caused by nanoscale CMOS,such as TDDB, quantum effect,etc.Through the study of this chapter,students are required to understand the limitation of size reduction and master a series of problems caused by nanoscale CMOS. Chapter3 VLSI physics(hours:16) (1)Integrated devices and models (Ih) (2)Resistance in integrated circuits (1.5h) (3)Capacitors in integrated circuits (0.5h) (4)Inductance in integrated circuits (0.5h) (5)Diode model (0.5h) (6)Layout design in integrated circuits (3h) (7)Layout,wiring and parasitic devices (Ih) (8)Antenna effect (0.5h) (9)Interconnection delay (1.5h) (10)Crosstalk noise (Ih) (11)Latch up effect of small size CMOS devices (Ih) (12)Integrated circuit ESD protection (2h) (13)Microelectronic packaging (Ih) (14)Failure analysis of integrated circuits and devices (Ih) This chapter introduces the basic physical problems of integrated circuit design,including interconnection delay,parasitic effect,reliability and so on.Students are required to understand 6研究生课程教学大纲 6 Chapter2 Challenges faced by CMOS devices reduced to nano size( hours: 12 ) (1) Limitation of size reduction（0.5h） (2) Challenge of size reduction to process technology（0.5h） (3) Problems of thin gate oxide（2h） (4) Polysilicon depletion effect（1h） (5) Influence of quantum effect（1h） (6) Mobility degradation and velocity saturation（2h） (7) Influence of impurity random distribution（1h） (8) Limit of threshold voltage reduction（2h） (9) Influence of source drain series resistance（2h） This chapter describes a series of problems caused by nanoscale CMOS, such as TDDB, quantum effect, etc. Through the study of this chapter, students are required to understand the limitation of size reduction and master a series of problems caused by nanoscale CMOS. Chapter3 VLSI physics( hours: 16 ) (1) Integrated devices and models（1h） (2) Resistance in integrated circuits（1.5h） (3) Capacitors in integrated circuits（0.5h） (4) Inductance in integrated circuits（0.5h） (5) Diode model（0.5h） (6) Layout design in integrated circuits（3h） (7) Layout, wiring and parasitic devices（1h） (8) Antenna effect（0.5h） (9) Interconnection delay（1.5h） (10) Crosstalk noise（1h） (11) Latch up effect of small size CMOS devices（1h） (12) Integrated circuit ESD protection（2h） (13) Microelectronic packaging（1h） (14) Failure analysis of integrated circuits and devices（1h） This chapter introduces the basic physical problems of integrated circuit design, including interconnection delay, parasitic effect, reliability and so on. Students are required to understand