CMOS Manufacturing steps 1. Twin-well Implants Passivation layer 2. Shallow Trench Isolation 3. Gate Structure 4. Lightly Doped Drain Implants ILD-5 M-4 5. Sidewall Spa ILD-4 C5 6. Source/Drain Implants LD-3 7. Contact Formation 8. Local Interconnect ILD-2 9. Interlayer Dielectric to Via-1 34438%%A3 M-122 13 ILD-1 10. First Metal layer 11. Second ild to via-2 LI oxide 12. Second Metal Layer to Via-3 13. Metal-3 to Pad Etch p Epitaxial layer 14. Parametric Testing p* Silicon substrate zhang@fudan.edu.cn复旦大学张荣君rjzhang@fudan.edu.cn 复旦大学 张荣君 1. Twin-well Implants 2. Shallow Trench Isolation 3. Gate Structure 4. Lightly Doped Drain Implants 5. Sidewall Spacer 6. Source/Drain Implants 7. Contact Formation 8. Local Interconnect 9. Interlayer Dielectric to Via-1 10. First Metal Layer 11. Second ILD to Via-2 12. Second Metal Layer to Via-3 13. Metal-3 to Pad Etch 14. Parametric Testing Passivation layer Bonding pad metal p+ Silicon substrate LI oxide STI n-well p-well ILD-1 ILD-2 ILD-3 ILD-4 ILD-5 M-1 M-2 M-3 M-4 Poly gate p- Epitaxial layer pp++ ILD-6 LI metal Via pp++ pp++ n+ n+ n+ 2 3 1 4 5 6 7 8 9 10 11 12 13 14 CMOS Manufacturing Steps