FIGURE 79.1 TTL inverter circuit block diagram and operation. be in saturation and i acts like a closed switch between the collector and emitter terminals. The transistor is turned off when the base is not biased with a high enough voltage(with respect to the emitter). Under this condition, the transistor acts like an open switch between the collector and emitter terminals Figure 79. 1 illustrates the transistor circuit blocks used in a standard TTL inverter. Four transistors are used to achieve the inverter function. The input to the gate connects to the emitter of transistor Q1, the input coupling transistor. a clamping diode on the input prevents negative input voltage spikes from damaging Q1 The collector voltage(and current)of Q1 controls Q2, the phase splitter transistor Q2, in turn, controls the Q3 and Q4 transistors forming the output circuit, which is called a totem-pole arrangement. Q4 serves as a pull-up transistor to pull the output high when it is turned on. Q3 does just the opposite to the output and serves as a pull-down transistor Q3 pulls the output low when it is turned on Only one of the two transistors in the totem pole may be turned on at a time, which is the function of the phase splitter transistor Q2 When a high logic level is applied to the inverters input, Q1's base-emitter junction will be reverse biased and the base-collector junction will be forward biased. This circuit condition will allow Q1 collector current to flow into the base of Q2, saturating Q2 and thereby providing base current into Q3, turning it on also. The collector voltage of Q2 is too low to turn on Q4 so that it appears as an open in the top part of the totem pole the output near ground potential, producing a low output result for a high input into the inverte emitter diode between the two totem-pole transistors provides an extra voltage drop in series with the base-emitter ction of Q4 to ensure that Q4 will be turned off when Q2 is turned on. The saturated Q3 transistor bring When a low logic level is applied to the inverter's input, QIs base-emitter junction will be forward biased and the base-collector junction will be reverse biased. This circuit condition will turn on Q1 so that the collector terminal is shorted to the emitter and, therefore, to ground (low level). This low voltage is also on the base of Q2 and turns Q2 off with Q2 off, there will be insufficient base current into Q3, turning it off also Q2 leakage current is shunted to ground with a resistor to prevent the partial turning on of Q3. The collector voltage of c2000 by CRC Press LLC© 2000 by CRC Press LLC be in saturation and, ideally, acts like a closed switch between the collector and emitter terminals. The transistor is turned off when the base is not biased with a high enough voltage (with respect to the emitter). Under this condition, the transistor acts like an open switch between the collector and emitter terminals. Figure 79.1 illustrates the transistor circuit blocks used in a standard TTL inverter. Four transistors are used to achieve the inverter function. The input to the gate connects to the emitter of transistor Q1, the input coupling transistor. A clamping diode on the input prevents negative input voltage spikes from damaging Q1. The collector voltage (and current) of Q1 controls Q2, the phase splitter transistor. Q2, in turn, controls the Q3 and Q4 transistors forming the output circuit, which is called a totem-pole arrangement. Q4 serves as a pull-up transistor to pull the output high when it is turned on. Q3 does just the opposite to the output and serves as a pull-down transistor. Q3 pulls the output low when it is turned on. Only one of the two transistors in the totem pole may be turned on at a time, which is the function of the phase splitter transistor Q2. When a high logic level is applied to the inverter’s input, Q1’s base-emitter junction will be reverse biased and the base-collector junction will be forward biased. This circuit condition will allow Q1 collector current to flow into the base of Q2, saturating Q2 and thereby providing base current into Q3, turning it on also. The collector voltage of Q2 is too low to turn on Q4 so that it appears as an open in the top part of the totem pole. A diode between the two totem-pole transistors provides an extra voltage drop in series with the base-emitter junction of Q4 to ensure that Q4 will be turned off when Q2 is turned on. The saturated Q3 transistor brings the output near ground potential, producing a low output result for a high input into the inverter. When a low logic level is applied to the inverter’s input, Q1’s base-emitter junction will be forward biased and the base-collector junction will be reverse biased. This circuit condition will turn on Q1 so that the collector terminal is shorted to the emitter and, therefore, to ground (low level). This low voltage is also on the base of Q2 and turns Q2 off. With Q2 off, there will be insufficient base current into Q3, turning it off also. Q2 leakage current is shunted to ground with a resistor to prevent the partial turning on of Q3. The collector voltage of FIGURE 79.1 TTL inverter circuit block diagram and operation