第一节 三相同步发电机的基本工作原理 第二节 同步发电机的基本构造 第三节 大型同步发电机的基本系统

FPGA Design Method Design flow & tools Deign Model of Verilog HDL Design style of Verilog HDL Design Examples • RTL level design • Components of Datapath • Components of Controller

Digital Signal Processing • Signal & System • DSP system • Description for DSP FIR Filter Design & Implement • Digital Filter • Specification Design • Hardware Implementation Some Examples • Digital Down Converter • Central Processing Unit

Verilog for Verification • Testbench anatomy • Behavioral modeling for Testbench • Some examples Timing specification • Delay model • Timing verification • Pipeline technology Design For Test (DFT) Test vs. Verification Build In Self Test (BIST) Scan and Boundary Scan

• 2.1 Introduction • 2.2 Polynomial Curve Fitting: A Toy • 2.3 Over-fitting • 2.4 Cross-Validation • 2.5 Regularization • 2.6 Linear Basis Function Models • 2.7 Least Squares Revisited • 2.8 Bayesian Linear Regression

7.1 运输模型 7.2 运输问题的计算机求解 7.3 运输问题的应用 一、产销不平衡的运输问题 二、生产与储存问题 三、转运问题 7.4 运输问题的表上作业法 一、确定初始基本可行解 二、最优解的判别 三、改进运输方案的办法——闭回路调整法 四、如何找多个最优方案

• An overview on Internet applications and QoS requirements • Internet architecture and Protocols • Internet traffic control and Congestion Control - Traffic policing and shaping - buffer management (e.g. tail drop, AQM: RED, Blue,…) - Packet scheduling (e.g. WFQ, DRR, etc.). - TCP, ECN, etc. • Standardized services - Intserv/RSVP, DiffServ

• Review: Queuing Models for Birth-Death Process • Multiservice Loss System and The Stochastic Knapsack • Admission Policies • Optimization Concept • Optimal Complete Partitioning Policies • Optimal Coordinate Convex Policies • Case Study: Call Admission Control for Multi-service Mobile Networks with Bandwidth Asymmetry between Uplink and Downlink

3.1 Sparsity: Applications and Development 3.2 Sparsity Rendering Algorithms 3.3 EM 3.4 Variational Bayes 3.5 Sparse Signal Recovery: Performance PK 3.6 Other Applications for Bayes methods

➢ 掌握数字信号处理基本流程； ➢ 掌握数字低通滤波器的基本设计流程； ➢ 掌握Visual Studio平台下数字信号插值的基本实现流程