Phase Change memory aware data Management and Application Jiangtao Wang
Phase Change Memory Aware Data Management and Application Jiangtao Wang
Outline Introduction Integrating PCm into the memory hierarchy PCM for main memory PCM for auxiliary memory Conclusion
Outline • Introduction • Integrating PCM into the Memory Hierarchy − PCM for main memory − PCM for auxiliary memory • Conclusion
Phase change memory an emerging memory technology Memory(draM) Read/write speeds and Byte-addressable Lower ldle power Storage SSD HDD Non-volatile high capacity(high density
Phase change memory •An emerging memory technology •Memory(DRAM) −Read/write speeds and Byte-addressable −Lower Idle power •Storage(SSD & HDD) −Non-volatile −high capacity (high density)
Phase change memory DRAM PCM NAND Flash Page size 64B 64B 2KB Page read latency 20-50ns SoNs 25us Page write latency 20-50ns 1us w500us Endurance 106-108 10410 Idle power 100mW/GB 1mW/GB 1-10mW/GB Density 1x 2-4x 4x cons: Asymmetry read /write latency Limited write endurance
DRAM PCM NAND Flash Page size 64B 64B 2KB Page read latency 20-50ns ~50ns ~25us Page write latency 20-50ns ~1us ~500us Endurance ∞ 106 -108 104 -105 Idle power ~100mW/GB ~1mW/GB 1-10mW/GB Density 1x 2-4x 4x Phase change memory •Cons: −Asymmetry read/write latency −Limited write endurance
Phase change memory Read operation 10ns o 100ns 1us 10L 00us 1ms 10ms Write operation
Phase change memory Read operation 10ns 100ns 1us 10us 100us 1ms 10ms Write operation DRAM PCM FLASH HDD DRAM PCM FLASH HDD
Outline Introduction Integrating PCM into the Memory hierarchy PCM for main memory PCM for auxiliary memory Conclusion
Outline • Introduction • Integrating PCM into the Memory Hierarchy − PCM for main memory − PCM for auxiliary memory • Conclusion
Integrating PCM into the memory hierarchy PCM for main memory Replacing dram with PCm to achieve larger main memory capacity PCM for auxiliary memory PCM as a write buffer for HDd/SSD DISK Buffering dirty page to minimize the disk write l / os PCM as secondary storage Storing log records
Integrating PCM into the Memory Hierarchy • PCM for main memory – Replacing DRAM with PCM to achieve larger main memory capacity • PCM for auxiliary memory – PCM as a write buffer for HDD/SSD DISK Buffering dirty page to minimize the disk write I/Os – PCM as secondary storage Storing log records
[ISCA09] PCM for main memory (DAc'o9j CCD’11 [CIDR'1 CPU CPU CPU L1/L2 Cache L1/L2 Cache L1/L2 Cache Memory Controller Memory Controller Memory Controller DRAM Cache Write buffer Phase Change Memory Phase Change Memory Phase Change Memory HDD/SSD Disk HDD/SSD Disk HDD/SSD Disk (a PCM-only memory (b DRAM as a cache memory cDRAM as a write buffer
PCM for main memory Phase Change Memory Memory Controller HDD/SSD Disk CPU L1/L2 Cache (a)PCM-only memory Phase Change Memory Memory Controller HDD/SSD Disk CPU L1/L2 Cache DRAM Cache (b)DRAM as a cache memory Phase Change Memory Memory Controller HDD/SSD Disk CPU L1/L2 Cache DRAM Write buffer (c)DRAM as a write buffer [ISCA’09] [ICCD’11] [DAC’09] [CIDR’11]
PCM for main memory Challenges with PCM Major disadvantage -Writes Compared to read operation PCm writes incur higher energy consumption higher latency and limited endurance Read latency 20 50ns Write latency lus Read energy 1 J/GB Write energy 6J/GB Endurance 1056~108 Reducing PCM writes is an important goal of data management on PCM!
PCM for main memory Challenges with PCM • Major disadvantage – Writes Compared to read operation ,PCM writes incur higher energy consumption、 higher latency and limited endurance Read latency 20~50ns Write latency ~1us Read energy 1 J/GB Write energy 6 J/GB Endurance 106~108 Reducing PCM writes is an important goal of data management on PCM !
PCM for main memory IiSCAs'O7 [ISCA09 Optimization on pCm write [MICRO09 Optimization data comparison write Goal: write only modified bits rather than entire cache line Approach: read-compare-write CPU cache010110000110101 0 0110 01|101110 rea PCM po1o1oaao1o1叫1
• Optimization: data comparison write • Goal: write only modified bits rather than entire cache line • Approach: read-compare-write 0 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 0 1 0 1 1 0 10 10 0 1 1 0 1 10 1 01 0 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 0 1 0 1 1 0 0 0 0 1 1 0 1 0 1 1 CPU cache PCM PCM for main memory Optimization on PCM write [ISCAS’07] [ISCA’09] [MICRO’09] read