Philips Semiconductors ation USB interface device with parallel bus PDIUSBD12 GoodLinkTM Parallel and DMA Interface Good USB connection indication is provided through GoodLinkTM A generic parallel interface is defined for ease-of-use, speed, and technology. During enumeration, the LED indicator will blink ON allows direct interfacing to major microcontrollers. To a momentarily corresponding to the enumeration traffic. When the microcontroller, the PDIUSBD12 appears as a memory device with PDIUSBD12 is successfully enumerated and configured, the LED 8-bit data bus and 1 address bit(occupying 2 locations). The indicator will be permanently ON. Subsequent successful (with PDIUSBD12 supports both multiplexed and non-multiplexed acknowledgement) transfer to and from the PDIUSBD12 will blink address and data bus. The PDIUSBD12 also supports DMA (Direct OFF the LED During suspend, the LED will be OFF. Memory Access)transfer which allows the main endpoint(endpoint This feature provides a user-friendly indicator on the status of the 2)to directly transfer to and from the local shared memory. Both USB device. the connected hub and the usB traffic. it is a useful single cycle and burst mode DMA transfers are supported field diagnostics tool to isolate faulty equipment. This feature helps Example of parallel interface to a dedicated 80c51 lower field support and hotline costs. In this example, the ALE is permanently tied LOW to signify a emory Management Unit(MMU)and eparate address and data bus configuration. The A0 pin of the Integrated RAM PDIUSBD12 connects to any of the 80C51 WO port. This port The MMU and the integrated RAM buffer the difference in speed controls command or data phase to the PDIUSBD12. The between USB, running in bursts of 12 Mbits/s and the parallel multiplexed address and data bus of the 80C51 can now be connected directly to the data bus of the PDIUSBD 12. The address interface to the microcontroller this allows the microcontroller to read and write USB packets at its own speed phase will simply be ignored by the PDIUSBD12. The crystal input of the 80C51 can be supplied by the CLKoUT output of the PDIUSBD12 80c51 INT N DATA [7: 0 P.70.0yA:0 RD N CLKOUT XTAL1 CS NPhilips Semiconductors Product specification USB interface device with parallel bus PDIUSBD12 1999 Jan 08 4 GoodLink Good USB connection indication is provided through GoodLink technology. During enumeration, the LED indicator will blink ON momentarily corresponding to the enumeration traffic. When the PDIUSBD12 is successfully enumerated and configured, the LED indicator will be permanently ON. Subsequent successful (with acknowledgement) transfer to and from the PDIUSBD12 will blink OFF the LED. During suspend, the LED will be OFF. This feature provides a user-friendly indicator on the status of the USB device, the connected hub and the USB traffic. It is a useful field diagnostics tool to isolate faulty equipment. This feature helps lower field support and hotline costs. Memory Management Unit (MMU) and Integrated RAM The MMU and the integrated RAM buffer the difference in speed between USB, running in bursts of 12 Mbits/s and the parallel interface to the microcontroller. This allows the microcontroller to read and write USB packets at its own speed. Parallel and DMA Interface A generic parallel interface is defined for ease-of-use, speed, and allows direct interfacing to major microcontrollers. To a microcontroller, the PDIUSBD12 appears as a memory device with 8-bit data bus and 1 address bit (occupying 2 locations). The PDIUSBD12 supports both multiplexed and non-multiplexed address and data bus. The PDIUSBD12 also supports DMA (Direct Memory Access) transfer which allows the main endpoint (endpoint 2) to directly transfer to and from the local shared memory. Both single cycle and burst mode DMA transfers are supported. Example of parallel interface to a dedicated 80C51 In this example, the ALE is permanently tied LOW to signify a separate address and data bus configuration. The A0 pin of the PDIUSBD12 connects to any of the 80C51 I/O port. This port controls command or data phase to the PDIUSBD12. The multiplexed address and data bus of the 80C51 can now be connected directly to the data bus of the PDIUSBD12. The address phase will simply be ignored by the PDIUSBD12. The crystal input of the 80C51 can be supplied by the CLKOUT output of the PDIUSBD12. PDIUSBD12 80C51 INT_N A0 DATA [7:0] WR_N RD_N CLKOUT CS_N ALE XTAL1 –RD/P3.7 –WR/P3.6 P [0.7:0.0]/AD [7:0] ANY I/O PORT (e.g. P3.3) –INTO/P3.2 SV00870