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《电力系统自动装置》课程教学大纲 Automation Device of Power System
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《嵌入式应用开发》课程教学资源(文献资料)UM0424 User manual STM32 USB-FS-Device development kit
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5.0 Introduction 5.1 Device Structure and Physical Operation 5.2 Current-Voltage Characteristics 5.3 The BJT as an Amplifier and as a Switch 5.4 BJT Circuits at DC 5.5 Biasing in BJT Amplifier Circuits 5.6 Small-Signal Operation and Models 5.7 Single-Stage BJT Amplifiers 5.8 The BJT Internal Capacitances and High-Frequency Model 5.9 Frequency Response of the Common-Emitter Amplifier 5.10 The Basic BJT Digital Logic Inverter 5.11 The SPICE BJT Model and Simulation Examples
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4.0 Introduction 4.1 Device Structure and Physical Operation 4.2 Current-Voltage Characteristics 4.3 MOSFET Circuits at DC 4.4 The MOSFET as an Amplifier and as a Switch 4.5 Biasing in MOS Amplifier Circuits 4.6 Small-Signal Operation and Models 4.7 Single-Stage MOS Amplifiers 4.8 The MOSFET Internal Capacitances and High-Frequency Model 4.9 Frequency Response of the CS Amplifier 4.10 The CMOS Digital Logic Inverter 4.11 The Depletion-Type MOSFET 4.12 The SPICE MOSFET Model and Simulation Example
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上海建桥学院:信息技术学院《移动设备应用软件开发》课程教学大纲 Mobile Device Application Development
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§5.1 自然光与偏振光 Natural Light and Polarized Light §5.3 单轴晶体的双折射现象 §5.4 光在晶体中波面 Wave Front of Light in the Crystal §5.5 光在晶体中的传播方向 Direction of Light Propagation in the Crystal §5.6 晶体偏振器件 Crystal Polarization Device §5.7 椭圆偏振光与圆偏振光 Elliptically and Circularly Polarized Light §5.8 偏振态的实验检验 Experimental Analysis of Polarized Light §5.9 偏振光的干涉 Interference of Polarized Light §5.10 光弹性效应和电光效应 Photoelastic Effect and Electro-Optic Effect 5.11 旋光现象 (Rotational Phenomena)
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9.1 Engine Start Overview 发动机起动概述 9.2 Start Assist Device 起动辅助装置 9.3 Starting Motor 起动机 9.4 Over-speed Protector 超速保护装置 9.5 Decelerating Starter 减速起动机
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1 I/O Hardware and I/O control methods Polling (轮询方式) Interrupts (中断方式) Direct Memory Access (DMA方式) I/O hardware summary 2 Application I/O Interface Block and Character Devices Network Devices Clocks and Timers Blocking (阻塞) and Nonblocking (非阻塞) I/O 3 Kernel I/O Subsystem I/O Scheduling Buffering (缓冲机制) Caching, Spooling & device reservation Error Handling I/O Protection Kernel Data Structures 4 Transforming I/O Requests to Hardware Operations 5 Performance
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1. Research Background 2. System Implementation 3. Experiment and Results 4. Sum and Prospect
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烟台理工学院:《数字电路与逻辑设计》课程教学资源(课件讲稿)第六章 时序逻辑电路 6.5 可编程逻辑器件(Programmable Logic Device,PLD)
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