SI STM32L431xx ife.augmented Ultra-low-power ArmR CortexR-M4 32-bit MCU+FPU,100DMIPS up to 256KB Flash,64KB SRAM,analog,audio Datasheet-production data Features .Ultra-low-power with FlexPowerControl 巴 1.71 V to 3.6 V power supply -40℃to85/105/125℃te 8品岛3 Up to 83 fast l/Os,most 5 V-tolerant RTC with HW calendar,alarms and calibration 8 nA Shutdown mode(5 wakeup pins) -28 nA Standby mode(5 wakeup pins) nsors -280 nA Standby mode with RTC M92eae1a8AwhRc 1mers:i advanced motor-contro bit basic,2x low-power 16-bit timers (available Batch acquisition mode (BAM) in Stop mode).2x watchdogs.SysTick timer 4 us wak eup from Stop mode ·Memories Brown out res t(BOR) -Up to 256 KB single bank Flash, nierconectmatn readout protection FPU. 64KBoeoatvch Quad SPI memory interface Rich an ction Performance benchmark 1.25 DMIPS/MHz(Drystone 2.1) CoreMark(3.42 CoreMark/MHz 2x 12-bit DAC output channels,low-power sample and hold 1x operational amplifier with built-in PGA 2x ultra-low-power comparators 16x communication interfaces Clock Sources -1x SAl (serial audio interface) 4 to 48 MHz crystal oscillator 3x 12C FM+(1 Mbit/s).SMBus/PMBus 32 kHz crystal oscillator for RTC(LSE) 4x USARTs (ISO 7816.LIN.IrDA,modem) Internal 16 MHz factory-trimmed RC(1%) 1x LPUART(Stop 2 wake-up) nternal low-power 32 kHz RC (+5%) 3x SPls (and 1x Quad SPI) ed 100( CAN(2.0B Active)and SDMMC inte than ce Internal 48 MHz with clock recovery .14-channel DMA controller -2 PLLs for system clock,audio.ADC True random number generator .CRC calculation unit,96-bit unique ID May 2018 DS11453 Rev 3 1/208 is is information on a product in full productio www.st.com
This is information on a product in full production. May 2018 DS11453 Rev 3 1/208 STM32L431xx Ultra-low-power Arm® Cortex®-M4 32-bit MCU+FPU, 100DMIPS, up to 256KB Flash, 64KB SRAM, analog, audio Datasheet - production data Features • Ultra-low-power with FlexPowerControl – 1.71 V to 3.6 V power supply – -40 °C to 85/105/125 °C temperature range – 200 nA in VBAT mode: supply for RTC and 32x32-bit backup registers – 8 nA Shutdown mode (5 wakeup pins) – 28 nA Standby mode (5 wakeup pins) – 280 nA Standby mode with RTC – 1.0 µA Stop 2 mode, 1.28 µA with RTC – 84 µA/MHz run mode – Batch acquisition mode (BAM) – 4 µs wakeup from Stop mode – Brown out reset (BOR) – Interconnect matrix • Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait-state execution from Flash memory, frequency up to 80 MHz, MPU, 100DMIPS and DSP instructions • Performance benchmark – 1.25 DMIPS/MHz (Drystone 2.1) – 273.55 CoreMark® (3.42 CoreMark/MHz @ 80 MHz) • Energy benchmark – 176.7 ULPBench® score • Clock Sources – 4 to 48 MHz crystal oscillator – 32 kHz crystal oscillator for RTC (LSE) – Internal 16 MHz factory-trimmed RC (±1%) – Internal low-power 32 kHz RC (±5%) – Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy) – Internal 48 MHz with clock recovery – 2 PLLs for system clock, audio, ADC • Up to 83 fast I/Os, most 5 V-tolerant • RTC with HW calendar, alarms and calibration • Up to 21 capacitive sensing channels: support touchkey, linear and rotary touch sensors • 11x timers: 1x 16-bit advanced motor-control, 1x 32-bit and 2x 16-bit general purpose, 2x 16- bit basic, 2x low-power 16-bit timers (available in Stop mode), 2x watchdogs, SysTick timer • Memories – Up to 256 KB single bank Flash, proprietary code readout protection – 64 KB of SRAM including 16 KB with hardware parity check – Quad SPI memory interface • Rich analog peripherals (independent supply) – 1x 12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 µA/Msps – 2x 12-bit DAC output channels, low-power sample and hold – 1x operational amplifier with built-in PGA – 2x ultra-low-power comparators • 16x communication interfaces – 1x SAI (serial audio interface) – 3x I2C FM+(1 Mbit/s), SMBus/PMBus – 4x USARTs (ISO 7816, LIN, IrDA, modem) – 1x LPUART (Stop 2 wake-up) – 3x SPIs (and 1x Quad SPI) – CAN (2.0B Active) and SDMMC interface – SWPMI single wire protocol master I/F – IRTIM (Infrared interface) • 14-channel DMA controller • True random number generator • CRC calculation unit, 96-bit unique ID LQFP64 (10x10) UFBGA100 (7×7) LQFP48 (7x7) UFBGA64 (5x5) LQFP100 (14x14) UFQFPN32 (5x5) WLCSP64 UFQFPN48 (7x7) WLCSP49 www.st.com
STM32L431xx beXebPTaspPoetseeie All packages are ECOPACK2compliant cell T Table 1.Device summary Reference Part numbers STM32L431xx C.STM32L431RC.STM32L431VC,STM32L431CB, 2208 DS11453 Rev 3 7
STM32L431xx 2/208 DS11453 Rev 3 • Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ • All packages are ECOPACK2® compliant Table 1. Device summary Reference Part numbers STM32L431xx STM32L431CC, STM32L431KC, STM32L431RC, STM32L431VC, STM32L431CB, STM32L431KB, STM32L431RB
STM32L431xx Contents Contents Introduction.....................12 Description. ,13 Functional overview 17 3.1 Arm Cortex-M4 core with FPU............................... 1> 3.2 Adaptive real-time memory accelerator(ART AcceleratorTM).........17 3.3 Memory protection unit....................................17 3.4 Embedded Flash memory 3.5 Embedded SRAM ..19 3.6 Firewall..............19 3.7 Boot modes 20 3.8 Cyclic redundancy check calculation unit(CRC) .20 3.9 Power supply management 3.9.1 Power supply schemes 20 3.92 Power supply supervisor 22 3.9.3 Voltage regulator..........................................23 3.9.4 Low-power modes .23 3.9.5 Resetmode..................................... 3 3.9.6 VBAT operation 3 3.10 Interconnect matrix..................................... …3 3.11 Clocks and startup..........................................33 3.12 General-purpose inputs/outputs(GPIOs).............. .36 3.13 Direct memory access controller(DMA) .36 3.14 Interrupts and events 37 3.14.1 Nested vectored interrupt controller(NVIC) 3.14.2 Extended interrupt/event controller(EXTI) .37 3.15 Analog to digital converter (ADC)...............................38 3151 Temperature sensor. ,..38 3.15.2 Internal voltage reference(VREFINT) 39 3.15.3 VBAT battery voltage monitoring .39 3.16 Digital to analog converter(DAC) 39 7 DS11453 Rev 3 3/208
DS11453 Rev 3 3/208 STM32L431xx Contents 6 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.1 Arm® Cortex®-M4 core with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.2 Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 17 3.3 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.5 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.6 Firewall . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.7 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.8 Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 20 3.9 Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.9.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.9.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.9.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.9.4 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.9.5 Reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.9.6 VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.10 Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.11 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3.12 General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 36 3.13 Direct memory access controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3.14 Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 3.14.1 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 37 3.14.2 Extended interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . 37 3.15 Analog to digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 3.15.1 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 3.15.2 Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . 39 3.15.3 VBAT battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 3.16 Digital to analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Contents STM32L431xx 3.17 Voltage reference buffer(VREFBUF) 40 3.18 Comparators(COMP)... ..41 3.19 Operational amplifier(OPAMP) 3.20 Touch sensing controller(TSC) 41 3.21 Random number generator(RNG) …42 3.22 Timers and watchdogs........................................42 3.22.1 Advanced-control timer(TIM1) 43 322.2 General-purpose timers (TIM2.TIM15,TIM16) 44 3.22.3 Basic timers (TIM6 and TIM7) 8 3224 Low-power timer(LPTIM1 and LPTIM2) 3.22.5 Infrared interface (IRTIM 3.22.6 Independent watchdog (IWDG)... .45 3227 System window watchdog (WDG) 3.22.8 SysTick timer..... .45 3.23 Real-time clock(RTC)and backup registers 46 3.24 Inter-integrated circuit interface (IC)...... .47 3.25 Universal synchronous/asynchronous receiver transmitter(USART)...48 3.26 Low-power universal asynchronous receiver transmitter(LPUART) 3.27 Serial peripheral interface(SPI) .50 3.28 Serial audio interfaces(SAI)................................... % 3.29 Single wire protocol master interface(SWPMI) 1 3.30 Controller area network(CAN).. .51 3.31 Secure digital input/output and MultiMediaCards Interface(SDMMC)...52 3.32 Clock recovery system(CRS) 52 3.33 Quad SPI memory interface(QUADSPI) .53 3.34 Development support.............. ..54 3.34.1 Serial wire JTAG debug port (SWJ-DP) ...54 3.342 Embedded Trace MacrocellT 54 4 Pinouts and pin description...................................55 Memory mapping ,80 6 Electrical characteristics ...84 61 Parameter conditions 84 4208 DS11453 Rev 3 7
Contents STM32L431xx 4/208 DS11453 Rev 3 3.17 Voltage reference buffer (VREFBUF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 3.18 Comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.19 Operational amplifier (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.20 Touch sensing controller (TSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.21 Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 3.22 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 3.22.1 Advanced-control timer (TIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 3.22.2 General-purpose timers (TIM2, TIM15, TIM16) . . . . . . . . . . . . . . . . . . . 44 3.22.3 Basic timers (TIM6 and TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.22.4 Low-power timer (LPTIM1 and LPTIM2) . . . . . . . . . . . . . . . . . . . . . . . . 44 3.22.5 Infrared interface (IRTIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.22.6 Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.22.7 System window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.22.8 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.23 Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 46 3.24 Inter-integrated circuit interface (I2C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 3.25 Universal synchronous/asynchronous receiver transmitter (USART) . . . 48 3.26 Low-power universal asynchronous receiver transmitter (LPUART) . . . . 49 3.27 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 3.28 Serial audio interfaces (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 3.29 Single wire protocol master interface (SWPMI) . . . . . . . . . . . . . . . . . . . . 51 3.30 Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 3.31 Secure digital input/output and MultiMediaCards Interface (SDMMC) . . . 52 3.32 Clock recovery system (CRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 3.33 Quad SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 53 3.34 Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3.34.1 Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 54 3.34.2 Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 4 Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
STM32L431xx Contents Minimum and maximum values 84 612 Typical values 6.1.3 Typical curves 84 614 Loading capacitor 61.5 Pin input voltage 「 6.1.6 Power supply scheme 85 6.1.7 Current consumption measurement 6.2 Absolute maximum ratings 86 6.3 Operating conditions................................... % 6.3.1 General operating conditions 632 Operating conditions at power-up power-down................. 9 6.3.3 Embedded reset and power control block characteristics9 63.4 Embedded voltage reference 6.3.5 Supply current characteristics................................ 93 6.3.6 Wakeup time from low-power modes and voltage scaling transition times......................... ....111 6.3.7 External clock source characteristics .114 63.8 nteral clock source characteristics 119 6.3.9 PLL characteristics,...。.,.,.,,.,,,..,..,.,,,,., 125 6.3.10 Flash memory characteristics 127 6.3.11 EMC characteristics.............,,.,.................. 128 6.312 Electrical sensitivity characteristics 129 63.13 current injection characteristics 130 6.3.14 lo port characteristics.....................................131 6.3.15 NRST pin characteristics ,136 63.16 Extended interrupt and event controller input(EXTI)characteristics 137 6.3.17 Analoa switches booster ,137 6.3.18 6.3.19 Digital-to-Analog converter characteristics .151 6.3.20 Voltage reference buffer characteristics 1 6.3.21 Comparator characteristics 15 6.3.22 Operational amplifiers characteristics 5 6.3.23 Temperature sensor characteristics 6 6.324 VBAr monitoring characteristics 6.3.25 Timer characteristics 163 6.3.26 Communication interfaces characteristics 164 DS11453 Rev 3 5/208
DS11453 Rev 3 5/208 STM32L431xx Contents 6 6.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 6.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 6.3.2 Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 89 6.3.3 Embedded reset and power control block characteristics . . . . . . . . . . . 89 6.3.4 Embedded voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 6.3.5 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 6.3.6 Wakeup time from low-power modes and voltage scaling transition times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 6.3.7 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 114 6.3.8 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 119 6.3.9 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 6.3.10 Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 6.3.11 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 6.3.12 Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 6.3.13 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 6.3.14 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 6.3.15 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 6.3.16 Extended interrupt and event controller input (EXTI) characteristics . . 137 6.3.17 Analog switches booster . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 6.3.18 Analog-to-Digital converter characteristics . . . . . . . . . . . . . . . . . . . . . 138 6.3.19 Digital-to-Analog converter characteristics . . . . . . . . . . . . . . . . . . . . . 151 6.3.20 Voltage reference buffer characteristics . . . . . . . . . . . . . . . . . . . . . . . 156 6.3.21 Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158 6.3.22 Operational amplifiers characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 159 6.3.23 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 6.3.24 VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 6.3.25 Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 6.3.26 Communication interfaces characteristics . . . . . . . . . . . . . . . . . . . . . . 164
Contents STM32L431xx Package information 177 7.1 LQFP100 package information 177 7.2 UFBGA100 package information.............................. 180 7.3 LQFP64 package information 183 7.4 UFBGA64 package information 185 7.5 WLCSP64 package information 188 7.6 WLCSP49 package information 191 7.7 LOFP48 package information 194 7.8 UFQFPN48 package information 。。。。。。。。。。。。。。。。。。。 197 7.9 UFQFPN32 package information 199 7.10 Thermal characteristics 203 7.10.1 Reference document.............................. 7.10.2 Selecting the product temperature range 204 Ordering information 206 9 Revision history .207 6208 DS11453 Rev 3 7
Contents STM32L431xx 6/208 DS11453 Rev 3 7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177 7.1 LQFP100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177 7.2 UFBGA100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180 7.3 LQFP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183 7.4 UFBGA64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 7.5 WLCSP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188 7.6 WLCSP49 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191 7.7 LQFP48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194 7.8 UFQFPN48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197 7.9 UFQFPN32 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199 7.10 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203 7.10.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203 7.10.2 Selecting the product temperature range . . . . . . . . . . . . . . . . . . . . . . 204 8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
STM32L431xx List of tables List of tables device eaturesandp ipheral counts. essstatus versus readout protectio modes. Table 5 Table 6 STM32L431xx peripherals interconnect matrix ation alibra Intemal voltage reference calibration values 49260927 Table 12. STM32L431xx USART/LPUART features SAlimplermeatatioo sed in the pinout table Table15 STM32L431xx pin definitions 18556960 Table 18 STM32L431 memory map and peripheral register boundary addresses 058 Table 21 9688 General operating conditions Embedded internal voltage refe nce. nodes,code with data processing Cache ON Prefetch OFF) Table 27 mpion Run and Low-power run modes.code with data nRunand Low-power rn modes.code with data processing 5 Table28. Table29 ypic and ON Prefe Table30. Table 31. pamonARrsabeunnaLopowerrnmoeswnheremcoes unn running from SRAM1 % 8 Table 34 Current consumption in Stop 2 mode Current consumption in Stop 1 mode Table 37 urrent consumption in Standby mode able Current consumption 18% Per ator r on time 13 DS11453 Rev 3 71208
DS11453 Rev 3 7/208 STM32L431xx List of tables 9 List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Table 2. STM32L431xx family device features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . 13 Table 3. Access status versus readout protection level and execution modes. . . . . . . . . . . . . . . . . 18 Table 4. STM32L431xx modes overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 5. Functionalities depending on the working mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 6. STM32L431xx peripherals interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 7. DMA implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 8. Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 9. Internal voltage reference calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 10. Timer feature comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 11. I2C implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 12. STM32L431xx USART/LPUART features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 13. SAI implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 14. Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 15. STM32L431xx pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 16. Alternate function AF0 to AF7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Table 17. Alternate function AF8 to AF15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Table 18. STM32L431xx memory map and peripheral register boundary addresses . . . . . . . . . . . . 81 Table 19. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Table 20. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Table 21. Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Table 22. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Table 23. Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Table 24. Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 89 Table 25. Embedded internal voltage reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 Table 26. Current consumption in Run and Low-power run modes, code with data processing running from Flash, ART enable (Cache ON Prefetch OFF) . . . . . . . . . . . . . . . . . . . . . . . 94 Table 27. Current consumption in Run and Low-power run modes, code with data processing running from Flash, ART disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Table 28. Current consumption in Run and Low-power run modes, code with data processing running from SRAM1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Table 29. Typical current consumption in Run and Low-power run modes, with different codes running from Flash, ART enable (Cache ON Prefetch OFF) . . . . . . . . . . . . . . . . . . . . . . . 97 Table 30. Typical current consumption in Run and Low-power run modes, with different codes running from Flash, ART disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Table 31. Typical current consumption in Run and Low-power run modes, with different codes running from SRAM1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Table 32. Current consumption in Sleep and Low-power sleep modes, Flash ON . . . . . . . . . . . . . . 99 Table 33. Current consumption in Low-power sleep modes, Flash in power-down . . . . . . . . . . . . . 100 Table 34. Current consumption in Stop 2 mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Table 35. Current consumption in Stop 1 mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Table 36. Current consumption in Stop 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 Table 37. Current consumption in Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 Table 38. Current consumption in Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 Table 39. Current consumption in VBAT mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Table 40. Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 Table 41. Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Table 42. Regulator modes transition times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
List of tables STM32L431xx Table 43 O USARTA PUART Table 44. speed ext nal use clock characteristics Table 47 LSE oscillator characteristics (f=32.768 kHz) Table HSl16 oscillator charactenstics Table 50 Table 53 Flash memory characteristics Flash memory endurance and data retention Table 56 EMI Ch Table 57 absolute maximum ratings. Table 6 /static characteristics eristics Table63 NRST pin cha acteristics e6 haracteristics Table 66 ADC Table 69 ADC accuracy-limited test conditions Table 70 Table 72 eristics OPAMP ch racteristics Table 78 monitoring characteristics charging characteristics. Table 81 ID minmax tmeout period at 32KH (LS) Table 1212177422122000113401544466546655652061644609101717170 Table85 Quad SPI characteristics in SDR mode tenstics in DDR mod Table 88 SD/MMC dynamic characteristics,VDD=2.7 Vto3.6V ble 88 dynamic VDD 1.71 V to 1.9V PM Table 91 LOPF100-100-pin,14x14 mm low-profile quad flat package Table 92. UFBGA1001-all.mm.0.50 mm pitch.ultra fine pitch all grid 177 array package mechanical data .180 8/208 DS11453 Rev 3 7
List of tables STM32L431xx 8/208 DS11453 Rev 3 Table 43. Wakeup time using USART/LPUART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Table 44. High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Table 45. Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Table 46. HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Table 47. LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Table 48. HSI16 oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Table 49. MSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121 Table 50. HSI48 oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 Table 51. LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 Table 52. PLL, PLLSAI1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 Table 53. Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 Table 54. Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 Table 55. EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 Table 56. EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 Table 57. ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 Table 58. Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Table 59. I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Table 60. I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 Table 61. Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 Table 62. I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 Table 63. NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 Table 64. EXTI Input Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 Table 65. Analog switches booster characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 Table 66. ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 Table 67. Maximum ADC RAIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 Table 68. ADC accuracy - limited test conditions 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 Table 69. ADC accuracy - limited test conditions 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 Table 70. ADC accuracy - limited test conditions 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 Table 71. ADC accuracy - limited test conditions 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 Table 72. DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 Table 73. DAC accuracy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 Table 74. VREFBUF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156 Table 75. COMP characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158 Table 76. OPAMP characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159 Table 77. TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 Table 78. VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 Table 79. VBAT charging characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 Table 80. TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 Table 81. IWDG min/max timeout period at 32 kHz (LSI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 Table 82. WWDG min/max timeout value at 80 MHz (PCLK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 Table 83. I2C analog filter characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Table 84. SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166 Table 85. Quad SPI characteristics in SDR mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 Table 86. QUADSPI characteristics in DDR mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Table 87. SAI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 Table 88. SD / MMC dynamic characteristics, VDD=2.7 V to 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . 174 Table 89. eMMC dynamic characteristics, VDD = 1.71 V to 1.9 V . . . . . . . . . . . . . . . . . . . . . . . . . . 175 Table 90. SWPMI electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176 Table 91. LQPF100 - 100-pin, 14 x 14 mm low-profile quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177 Table 92. UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
STM32L431xx List of tables rules(0.5 mm pitch BGA) 181 183 Table95. package mechanical data. lchip scale ckag e mechanical data CSP49. 96amea1g,geme035mpten 18 vel chin scale acka e mechanical data 8 hanical dat .195 Table 102. FP N48-48-lead. 7x7mm.0.5 mm pitch,ultra thin fine pitch quad flat 198 Table 103. .0.5 mm pitch ultra thin fine pitch quad fat package mechanical data STM32L431xx ordering information scheme Table 106.Document revision history................. 207 7 DS11453 Rev 3 9208
DS11453 Rev 3 9/208 STM32L431xx List of tables 9 Table 93. UFBGA100 recommended PCB design rules (0.5 mm pitch BGA) . . . . . . . . . . . . . . . . . 181 Table 94. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183 Table 95. UFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch ultra profile fine pitch ball grid array package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186 Table 96. UFBGA64 recommended PCB design rules (0.5 mm pitch BGA) . . . . . . . . . . . . . . . . . . 186 Table 97. WLCSP64 - 64-ball, 3.141 x 3.127 mm, 0.35 mm pitch wafer level chip scale package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188 Table 98. WLCSP64 recommended PCB design rules (0.35 mm pitch) . . . . . . . . . . . . . . . . . . . . . 189 Table 99. WLCSP49 - 49-ball, 3.141 x 3.127 mm, 0.4 mm pitch wafer level chip scale package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192 Table 100. WLCSP49 recommended PCB design rules (0.4 mm pitch) . . . . . . . . . . . . . . . . . . . . . . 193 Table 101. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195 Table 102. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198 Table 103. UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201 Table 104. Package thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203 Table 105. STM32L431xx ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206 Table 106. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
List of figures STM32L431xx List of figures Figure 1 L431xx block diagram ure 3. Power-up/down sequence gure STM32L431Vx LQFP100 inout Figure ure 9 STM32L431Rx UFBGA64 ballout(1) Figure 10 31RX WLC pinout wre 12 STM32L431CX LQFP48 pir STM 4 1Cx UFOFPN pinou() STM32L431xx memory map Figure 16 Pin loading conditions... 16125656655565665000446891 Figure 19 urement scheme igh-s Figure 22 Low-speed external clock sou rce AC timing diagram. Figure stal Figure 25 tempenMs1tfeqeney ure 28 input characteristics 161111012220 ion Figure 31 Figure 159 Figure 34. SPI timing diagram-slave mode and CPHA=0 Figure3 ming diagram -slave mode and CPHA=1 11 Sad SPI tim ing diagram-DDR mode. Figure 41 lo high-speed mode 0p100.10 pin,14x14 mm low-profile quad flat package outline Figure 44 LQFP100- -pin.14 x 14 mm low-profile quad flat age top view 限 Fiaure 46. UFBGA100-100-ball.7x7 mm,0.50 mm pitch,ultra fine pitch ball grid array package outline 180 10/208 DS11453 Rev 3 7
List of figures STM32L431xx 10/208 DS11453 Rev 3 List of figures Figure 1. STM32L431xx block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 2. Power supply overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 3. Power-up/down sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 4. Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 5. Voltage reference buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 6. STM32L431Vx LQFP100 pinout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Figure 7. STM32L431Vx UFBGA100 ballout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Figure 8. STM32L431Rx LQFP64 pinout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Figure 9. STM32L431Rx UFBGA64 ballout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Figure 10. STM32L431Rx WLCSP64 pinout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Figure 11. STM32L431Cx WLCSP49 pinout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Figure 12. STM32L431Cx LQFP48 pinout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Figure 13. STM32L431Cx UFQFPN48 pinout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Figure 14. STM32L431Kx UFQFPN32 pinout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Figure 15. STM32L431xx memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Figure 16. Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Figure 17. Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Figure 18. Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Figure 19. Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Figure 20. VREFINT versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 Figure 21. High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Figure 22. Low-speed external clock source AC timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Figure 23. Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Figure 24. Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Figure 25. HSI16 frequency versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Figure 26. Typical current consumption versus MSI frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Figure 27. HSI48 frequency versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 Figure 28. I/O input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 Figure 29. I/O AC characteristics definition(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 Figure 30. Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 Figure 31. ADC accuracy characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 Figure 32. Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 Figure 33. 12-bit buffered / non-buffered DAC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 Figure 34. SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167 Figure 35. SPI timing diagram - slave mode and CPHA = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168 Figure 36. SPI timing diagram - master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168 Figure 37. Quad SPI timing diagram - SDR mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 Figure 38. Quad SPI timing diagram - DDR mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 Figure 39. SAI master timing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 Figure 40. SAI slave timing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 Figure 41. SDIO high-speed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 Figure 42. SD default mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176 Figure 43. LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat package outline . . . . . . . . . . . . . . 177 Figure 44. LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178 Figure 45. LQFP100 marking (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179 Figure 46. UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180