Vol 449 18 October 2007 doi: 10.1038/ nature06181 nature LETTERS Coaxial silicon nanowires as solar cells and nanoelectronic power sources Bozhi Tian *, Xiaolin Zheng *, Thomas J Kempa, Ying Fang!, Nanfang Yu, Guihua Yu, Jinlin Huang Charles m. Lieber 2 cells are attractive candidates for clean and renewable minimal amounts of metal catalyst were incorporated into the silicon s with miniaturization, they might also serve as integrated nanowire structure. Scanning electron microscopy ( SEm)images of a sources for nanoelectronic systems. The use of nano- typical p-i-n coaxial silicon nanowire recorded in the back-scattered structures or nanostructured materials represents a general electron mode(Fig. Ib)highlight several key features. First, the approach to reduce both cost and size and to improve efficiency uniform contrast of the nanowire core is consistent with a single in photovoltaics-. Nanoparticles, nanorods and nanowires have crystalline structure expected for silicon nanowires obtained by the been used to improve charge collection efficiency in polymer- VLS method.ls. Second, contrast variation observed in the shells multiplication, and to enable low-temperature processing of pho- 30-80 nm. Third, the core/shell silicon nanowires have uniform tovoltaic devices-. Moreover, recent theoretical studies have indi- cated that coaxial nanowire structures could improve carrier collection and overall efficiency with respect to single-crystal bulk a semiconductors of the same materials. However solar cell based on hybrid nanoarchitectures suffer from relatively low effi ciencies and poor stabilities. In addition, previous studies have not yet addressed their use as photovoltaic power elements in nano- Liquid.(si electronics. Here we report the realization of p-type/intrinsic/ n-typep-i-n)coaxial silicon nanowire solar cells Under one solar equivalent(l-sun)illumination, the p-i-n silicon nanowire ele- ments yield a maximum power output of up to 200 pw per nano- wire device and an apparent energy conversion efficiency of up to 3.4 per cent, with stable and improved efficiencies achievable at b Percentage of si atoms high-flux illuminations. Furthermore, we show that individual and interconnected silicon nanowire photovoltaic elements can serve as robust power sources to drive functional nanoelectronic sensors andlogic gates. These coaxial silicon nanowire photovoltaic elements provide a new nanoscale test bed for studies of photo- induced energy/charge transport and artificial photosynthesis and might find general usage as elements for powering ultralow- power electronics and diverse nanosystems We have focused on p-i-n coaxial silicon nanowire structures(Fig la)consisting of a p-type silicon nanowire core capped with i-and n-type silicon shells. An advantage of this core/shell architecture is hat carrier separation takes place in the radial versus the longer axial direction, with a carrier collection distance smaller or comparable to Figure 1 Schematics and electron microscopy images of the p-i-n coaxial the minority carrier diffusion length. Hence, photogenerated car- its cross-sectional diagram shows that the photogenerated electrons ( e riers can reach the p-i-n junction with high efficiency without sub- and holes(h+)are swept into the n-shell and p-core, respectively, by the stantial bulk recombination. An additional consequence of this built-in electric field. The phase diagram of gold(Au)-silicon (Si)alloy or geometry is that material quality can be lower than in a traditional the right panel illustrates that the core is grown by means of the VLS p-n junction device without causing large bulk recombination mechanism, whereas the shells are deposited at higher temperature n nanowire res were synthesized by means of a lower to inhibit further nanowire axial elongation. b, SEM nocluster-catalysed vapour-liquid-solid(VLS) method (back-scattered electron mode)of the p-i-n coaxial silicon nanowir con shells were then deposited at a higher temperature and lower different magnifications Scale bar, lum(top), 200 nm(bottom). The p-i-n pressure than for p-core growth(Fig. la, right panel)to inhibit axial and n-shell growth times of 60 min and 30 min, respectively. The feeding elongation of the silicon nanowire core during the shell deposition, ratios of silicon: boron and silicon phosphorus are 500: 1 and 200:1 where phosphine was used as the n-type dopant in the outer shell. respectively. c, High-resolution TEM image(spherical-aberration The growth temperatures were sufficiently low to ensure that corrected)of the p-i-n coaxial silicon nanowire Scale bar, 5nm. School of Engineering and Applied Sciences, Harvard University. Cambridge, Massachusetts 02138, USA. ese authors contributed equally to this 8s5 E2007 Nature Publishing Group
LETTERS Coaxial silicon nanowires as solar cells and nanoelectronic power sources Bozhi Tian1 *, Xiaolin Zheng1 *, Thomas J. Kempa1 , Ying Fang1 , Nanfang Yu2 , Guihua Yu1 , Jinlin Huang1 & Charles M. Lieber1,2 Solar cells are attractive candidates for clean and renewable power1,2; with miniaturization, they might also serve as integrated power sources for nanoelectronic systems. The use of nanostructures or nanostructured materials represents a general approach to reduce both cost and size and to improve efficiency in photovoltaics1–9. Nanoparticles, nanorods and nanowires have been used to improve charge collection efficiency in polymerblend4 and dye-sensitized solar cells5,6, to demonstrate carrier multiplication7 , and to enable low-temperature processing of photovoltaic devices3–6. Moreover, recent theoretical studies have indicated that coaxial nanowire structures could improve carrier collection and overall efficiency with respect to single-crystal bulk semiconductors of the same materials8,9. However, solar cells based on hybrid nanoarchitectures suffer from relatively low efficiencies and poor stabilities1 . In addition, previous studies have not yet addressed their use as photovoltaic power elements in nanoelectronics. Here we report the realization of p-type/intrinsic/ n-type (p-i-n) coaxial silicon nanowire solar cells. Under one solar equivalent (1-sun) illumination, the p-i-n silicon nanowire elements yield a maximum power output of up to 200 pW per nanowire device and an apparent energy conversion efficiency of up to 3.4 per cent, with stable and improved efficiencies achievable at high-flux illuminations. Furthermore, we show that individual and interconnected silicon nanowire photovoltaic elements can serve as robust power sources to drive functional nanoelectronic sensors andlogic gates. These coaxial silicon nanowire photovoltaic elements provide a new nanoscale test bed for studies of photoinduced energy/charge transport and artificial photosynthesis10, and might find general usage as elements for powering ultralowpower electronics11 and diverse nanosystems12,13. We have focused on p-i-n coaxial silicon nanowire structures (Fig. 1a) consisting of a p-type silicon nanowire core capped with i- and n-type silicon shells. An advantage of this core/shell architecture is that carrier separation takes place in the radial versus the longer axial direction, with a carrier collection distance smaller or comparable to the minority carrier diffusion length8 . Hence, photogenerated carriers can reach the p-i-n junction with high efficiency without substantial bulk recombination. An additional consequence of this geometry is that material quality can be lower than in a traditional p-n junction device without causing large bulk recombination1 . Silicon nanowire p-cores were synthesized by means of a nanocluster-catalysed vapour–liquid–solid (VLS) method14,15. Silicon shells were then deposited at a higher temperature and lower pressure than for p-core growth (Fig. 1a, right panel) to inhibit axial elongation of the silicon nanowire core during the shell deposition, where phosphine was used as the n-type dopant in the outer shell15. The growth temperatures were sufficiently low to ensure that minimal amounts of metal catalyst were incorporated into the silicon nanowire structure. Scanning electron microscopy (SEM) images of a typical p-i-n coaxial silicon nanowire recorded in the back-scattered electron mode (Fig. 1b) highlight several key features. First, the uniform contrast of the nanowire core is consistent with a singlecrystalline structure expected for silicon nanowires obtained by the VLS method14,15. Second, contrast variation observed in the shells is indicative of a polycrystalline structure grain of the order of 30–80 nm. Third, the core/shell silicon nanowires have uniform *These authors contributed equally to this work. 1 Department of Chemistry and Chemical Biology, 2 School of Engineering and Applied Sciences, Harvard University, Cambridge, Massachusetts 02138, USA. Shell growth Core growth 1,500 300 Au Si 0 100 Percentage of Si atoms n Temperature (°C) i p a b c Liquid + (Si) Liquid (Au) + Liquid h+ e– Figure 1 | Schematics and electron microscopy images of the p-i-n coaxial silicon nanowire. a, Illustrations of the core/shell silicon nanowire structure; its cross-sectional diagram shows that the photogenerated electrons (e2) and holes (h1) are swept into the n-shell and p-core, respectively, by the built-in electric field. The phase diagram of gold (Au)–silicon (Si) alloy on the right panel illustrates that the core is grown by means of the VLS mechanism, whereas the shells are deposited at higher temperature and lower pressure to inhibit further nanowire axial elongation. b, SEM images (back-scattered electron mode) of the p-i-n coaxial silicon nanowire at two different magnifications. Scale bar, 1 mm (top), 200 nm (bottom). The p-i-n silicon nanowire was grown with 100-nm-diameter gold catalyst, and with iand n-shell growth times of 60 min and 30 min, respectively. The feeding ratios of silicon:boron and silicon:phosphorus are 500:1 and 200:1, respectively. c, High-resolution TEM image (spherical-aberrationcorrected) of the p-i-n coaxial silicon nanowire. Scale bar, 5 nm. Vol 449| 18 October 2007| doi:10.1038/nature06181 885 ©2007 NaturePublishingGroup
LETTERS NATURE Vol 449 18 October 2007 diameters of -300 nm(280-360 nm for other nanowires), which is in nanowires were etched selectively using potassium hydroxide agreement with independent transmission electron microscopy (KOH) solution(see Methods)to expose the p-core in a lithograph- (TEM) and atomic force microscopy measurements. In addition, ically defined region, and then metal contacts were made to the high-resolution TEM images(Fig. lc) confirm that the nanowire p-core and n-shell after a second lithographic patterning step, as shell is indeed polycrystalline. We note that this nanocrystalline shown in the SEM images of Fig. 2b. Dark current-voltage(H shell structure could enhance light absorption in the nanowires curves obtained from devices fabricated in this way(Fig. 2c)exhibit several notable features. first, the linear ev curves from core-core To characterize electrical rt through pl-P2) and shell-shell (n1-n2)configurations indicate that ohmic silicon nanowires, we fabricat netal contacts selectively contacts are made to both core and shell portions of the nanowires. inner p-core and outer n-she a). Briefly, core/shell silicon Second, the FV curve for the shell-shell contact reveals a shell 1-n2 p p-i-n Figure 2 Device fabrication and diode characterization. a, Schematics of of p-i-n and p-n diodes. The ideality factor N can be extrapolated(dashed ond to the lines )from the diode linear diode, 0. 12-0.50 V; P-n diode, p-core, i-shell, n-shell and PECVD-coated SiO2, respectively. Middle, 0. 10-0.60V),which are 1.96. 52forp-j-n andp-n diodes, respectively. To selective etching to expose the p-core. Right, metal contacts deposited on the keep the total diameters of the p-n and p-i-n silicon nanowires approximately p-core and n-shell. b, SEM images corresponding to schematics in a. Scale the same, the p-n silicon nanowire was grown with a 100-nm bars are 100 nm(left), 200 nm(middle)and 1.5 um(right). c, Dark I-v catalyst and an n-shell growth time of 100 min The SiH, /dopants feeding rves of a p-i-n device with contacts on core-core, shell-shell and different ratios for p-n and p-i-n nanowires are the same(silicon:boron, 500: 1; core-shell combinations. Vbias, the applied bias voltage. Inset, optical silicon:phosphorus, 200: 1 ). e, Temperature-dependent I-V measurement of microscope image of the device Scale bar, 5 um. d, Semi-log scale I-V curves the p-n and p-i-n diodes in the reverse bias voltage regime E2007 Nature Publishing Group
diameters of ,300 nm (280–360 nm for other nanowires), which is in agreement with independent transmission electron microscopy (TEM) and atomic force microscopy measurements. In addition, high-resolution TEM images (Fig. 1c) confirm that the nanowire shell is indeed polycrystalline. We note that this nanocrystalline shell structure could enhance light absorption in the nanowires (see below). To characterize electrical transport through the p-i-n coaxial silicon nanowires, we fabricated metal contacts selectively to the inner p-core and outer n-shell (Fig. 2a). Briefly, core/shell silicon nanowires were etched selectively using potassium hydroxide (KOH) solution (see Methods) to expose the p-core in a lithographically defined region, and then metal contacts were made to the p-core and n-shell after a second lithographic patterning step, as shown in the SEM images of Fig. 2b. Dark current–voltage (I–V) curves obtained from devices fabricated in this way (Fig. 2c) exhibit several notable features. First, the linear I–V curves from core–core (p1-p2) and shell–shell (n1-n2) configurations indicate that ohmic contacts are made to both core and shell portions of the nanowires. Second, the I–V curve for the shell–shell contact reveals a shell a b e –10 –8 –6 –4 –2 0 –30 –20 –10 0 120 K 180 K 240 K 300 K c –2 –1 0 1 2 –8 –4 0 4 8 n2-p1 n2-p2 I (µA) Vbias (V) Vbias (V) Vbias (V) n1-n2 p1-p2 n1-p1 n1-p2 p1 n1 n2 p2 d 0.0 0.2 0.4 0.6 –25 –20 –15 ln(I) p-n p-i-n p-i-n p-n I (µA) Figure 2 | Device fabrication and diode characterization. a, Schematics of device fabrication. Left, pink, yellow, cyan and green layers correspond to the p-core, i-shell, n-shell and PECVD-coated SiO2, respectively. Middle, selective etching to expose the p-core. Right, metal contacts deposited on the p-core and n-shell. b, SEM images corresponding to schematics in a. Scale bars are 100 nm (left), 200 nm (middle) and 1.5 mm (right). c, Dark I–V curves of a p-i-n device with contacts on core–core, shell–shell and different core–shell combinations. Vbias, the applied bias voltage. Inset, optical microscope image of the device. Scale bar, 5 mm. d, Semi-log scale I–V curves of p-i-n and p-n diodes. The ideality factor N can be extrapolated (dashed lines) from the diode linear regimes (p-i-n diode, 0.12–0.50 V; p-n diode, 0.10–0.60 V),which are 1.96 and 4.52 for p-i-n and p-n diodes, respectively. To keep the total diameters of the p-n and p-i-n silicon nanowires approximately the same, the p-n silicon nanowire was grown with a 100-nm diameter gold catalyst and an n-shell growth time of 100 min. The SiH4/dopants feeding ratios for p-n and p-i-n nanowires are the same (silicon:boron, 500:1; silicon:phosphorus, 200:1). e, Temperature-dependent I–V measurement of the p-n and p-i-n diodes in the reverse bias voltage regime. LETTERS NATURE|Vol 449| 18 October 2007 886 ©2007 NaturePublishingGroup
NATURE Vol 449 18 October 20 LETTERS inductance of 132 uS, higher than that of the core(3 uS); the cal- contributions from tunnelling and avalanche mechanisms". Overall, culated shell resistivity is within a factor of two of that measured these results indicate that tunnelling or leakage currents are more for single-crystal n-type silicon nanowire prepared with a similar significant in the p-n diode", and that the diode quality factor and SiH4: PH, ratio. The highly conductive n-shell will reduce or elim- breakdown behaviour are readily controlled during nanowire growth curves recorded from different core-shell contact geometries show die introduction of the i-layer as in planar structures. 9 les were characterized under air mass 1.5 global (AM 1.5G)illu fying behaviour, and demonstrate that the p-i-n coaxial silicon mination. FV data recorded from one of the better devices(Fig 3 nanowires behave as well-defined diodes. The reproducibility of the yields an open-circuit voltage Vo of 0. 260 V, a short-circuit current further demonstrated by defining more complex 'ANDand OR' output Pmax for the silicon nanowire device at 1-sun(see Methods)is diode logic gates using single p-i-n coaxial silicon nanowires 72 pW. Notably, these values were constant for measurements made over a seven-month period, thus demonstrating excellent The core/shell silicon nanowire diodes were further characterized stability of our nanowire photovoltaic elements. In addition, F-V by analysing data recorded with and without the i-layer asa function of data recorded using contacts to the n-shell that were 5.9 um(n1) temperature Fits to In(D-V data recorded in forward bias from p-i-n and 13.3 um(n2) from the p-core contact( Fig. 3b)exhibited essen- and p-n coaxial structures(Fig 2d)are linear, and yield diode ideality tially the same photovoltaic response, thus indicating that the n-shell factors Nof 1.96 and 4.52, respectively(see Methods). The N-values is equipotential with radial carrier separation occurring uniformly show that introduction of the i-layer yields much better quality diodes. along the entire length of the core/shell silicon nanowire device. Reverse bias measurements from p-i-n and p-n diodes(Fig. 2e)also Measurements of Isc as a function of the p-i-n coaxial silicon nano- show markedly different behaviour: the p-i-n diode breaks down at wire(Fig. 3c) length show linear scaling with values of 1 nA silicon much larger reverse-bias voltage(approximately -7V)than the p-n nanowire readily achieved for lengths of 10 um(1-sun), whereas diode(approximately -1 V) for all temperatures studied. In addition, Voc is essentially independent of length. The linear scaling of Isc with the reverse-bias breakdown voltage of the p-n diode increases with silicon nanowire length suggests that photogenerated carriers ar decreasing temperature, which is consistent with a Zener(tunnelling) collected uniformly along the length of these radial nanostructures, breakdown mechanism, whereas the breakdown voltage of the and that scattering of light by the metal contacts does not make a p-i-n structures exhibits little temperature dependence, suggesting major contribution to the observed photocurrent. Figure 3 Characterization of the p-i-t nowire photovoltaic device. a, Dark -V curves. b, Light I-V curves for two different n-shell contact locations. Inset, optical 0.0 microscopy image of the device. Scale bar, 5 um. Device-length-dependent Isc and Jsc(upper Inset, light-intensity-dependent Isc and Voc plots. e, Temperature-dependent measurement. The levice was illuminated at 0. 6-sun to reduce 0.1000.1 ple heating, which may cause temperature blue circle correspond to Frll, Voc and Isct evice was characterized a,d and e. The p-i-n coaxial silicon nanowire using conditions as in Fig. 2. Intensity (mw cm V 0 s0:2。000。00000a 250 E2007 Nature Publishing Group
conductance of 132 mS, higher than that of the core (3 mS); the calculated shell resistivity is within a factor of two of that measured for single-crystal n-type silicon nanowire prepared with a similar SiH4:PH3 ratio15. The highly conductive n-shell will reduce or eliminate potential drop along the shell, thereby enabling uniform radial carrier separation and collection when illuminated8 . Third, I–V curves recorded from different core–shell contact geometries show rectifying behaviour, and demonstrate that the p-i-n coaxial silicon nanowires behave as well-defined diodes. The reproducibility of the selective etching and contact formation to p-cores and n-shells was further demonstrated by defining more complex ‘AND’ and ‘OR’ diode logic gates using single p-i-n coaxial silicon nanowires (Supplementary Fig. 1). The core/shell silicon nanowire diodes were further characterized by analysing data recorded with and without the i-layer as afunction of temperature. Fits to ln(I)–V data recorded in forward bias from p-i-n and p-n coaxial structures (Fig. 2d) are linear, and yield diode ideality factors N of 1.96 and 4.52, respectively (see Methods). The N-values show that introduction of the i-layer yields much better quality diodes. Reverse bias measurements from p-i-n and p-n diodes (Fig. 2e) also show markedly different behaviour: the p-i-n diode breaks down at much larger reverse-bias voltage (approximately 27 V) than the p-n diode (approximately 21 V) for all temperatures studied. In addition, the reverse-bias breakdown voltage of the p-n diode increases with decreasing temperature, which is consistent with a Zener (tunnelling) breakdown mechanism, whereas the breakdown voltage of the p-i-n structures exhibits little temperature dependence, suggesting contributions from tunnelling and avalanche mechanisms16. Overall, these results indicate that tunnelling or leakage currents are more significant in the p-n diode17, and that the diode quality factor and breakdown behaviour are readily controlled during nanowire growth by the introduction of the i-layer as in planar structures18,19. The photovoltaic properties of the p-i-n coaxial silicon nanowire diodes were characterized under air mass 1.5 global (AM 1.5G) illumination. I–V data recorded from one of the better devices (Fig. 3a) yields an open-circuit voltage Voc of 0.260 V, a short-circuit current Isc of 0.503 nA and a fill factor Ffill of 55.0%. The maximum power output Pmax for the silicon nanowire device at 1-sun (see Methods) is ,72 pW. Notably, these values were constant for measurements made over a seven-month period, thus demonstrating excellent stability of our nanowire photovoltaic elements. In addition, I–V data recorded using contacts to the n-shell that were 5.9 mm (n1) and 13.3 mm (n2) from the p-core contact (Fig. 3b) exhibited essentially the same photovoltaic response, thus indicating that the n-shell is equipotential with radial carrier separation occurring uniformly along the entire length of the core/shell silicon nanowire device. Measurements of Isc as a function of the p-i-n coaxial silicon nanowire (Fig. 3c) length show linear scaling with values of 1 nA silicon nanowire–1 readily achieved for lengths of 10 mm (1-sun), whereas Voc is essentially independent of length. The linear scaling of Isc with silicon nanowire length suggests that photogenerated carriers are collected uniformly along the length of these radial nanostructures, and that scattering of light by the metal contacts does not make a major contribution to the observed photocurrent. a b –0.1 0.0 0.1 0.2 –0.6 –0.3 0.0 0.3 p-n1 p-n2 I (nA) p n1 n2 100 150 200 250 300 0.0 0.2 0.4 0.6 0.8 I sc Ffill Ffill and Voc (V) and Isc (nA) Temperature (K) e c –0.1 0.0 0.1 0.2 0.3 –0.3 0.0 0.3 I (nA) Vbias (V) Vbias (V) Dark Light d 0 400 800 0.2 0.3 Intensity (mW cm–2) Voc (V) 0 2 4 Isc (nA) 0.1 0.2 0.3 –24 –21 –18 –15 ln (Isc) 5 10 15 20 25 0.0 0.5 1.0 1.5 2.0 2.5 Device length (µm) Isc (nA) 10 20 30 40 Apparent Jsc (mA cm–2) Voc (V) Voc Figure 3 | Characterization of the p-i-n silicon nanowire photovoltaic device. a, Dark and light I–V curves. b, Light I–V curves for two different n-shell contact locations. Inset, optical microscopy image of the device. Scale bar, 5 mm. c, Device-length-dependent Isc and Jsc (upper bound) plots. d, Plot of ln(Isc) versus Voc; each point corresponds to a different light intensity. Inset, light-intensity-dependent Isc and Voc plots. e, Temperature-dependent measurement. The device was illuminated at 0.6-sun to reduce sample heating, which may cause temperature fluctuations. The red triangle, black square and blue circle correspond to Ffill, Voc and Isc, respectively. The same device was characterized in a, d and e. The p-i-n coaxial silicon nanowire was grown using conditions as in Fig. 2. NATURE| Vol 449|18 October 2007 LETTERS 887 ©2007 NaturePublishingGroup
LETTERS NATURE Vol 449 18 October 2007 The apparent short-circuit current density )sc calculated using the tudies".and represents an area that should be addressed in future projected area of the core/shell nanowire structure was 23.9+ studies. However, the overall apparent efficiency of the p-i-n coaxial 1.2 mAcm(upper bound, excluding metal covered and exposed silicon nanowire photovoltaic elements--3.4%(upper bound) and p-core areas) and 16.0=0.8 mAcm(lower bound, including 2.3%(lower bound)exceeds reported nanorod/polymer and metal-covered and exposed p-core areas)for the device in Fig. 3a. nanorod/dye systems", and could be increased substantially with The use of projected area to estimate the apparent current density is improvements in Vo by means of, for example, surface passivation. consistent with the methodology used with other nanostructured In addition, increasing the illumination intensity can yield stable photovoltaic devices and our use of devices as nanoscale power improvements in the apparent efficiency of our p-i-n coaxial silicon sources( see below, Fig 4) Control experiments were also carried out nanowire photovoltaic elements in contrast to other nanostructured to investigate the principal area of light absorption by devices. For solar cells, which often exhibit degradation. example, measurements made on devices with and without litho- The ability of individual core/shell silicon nanowires to function as graphic masks that block illumination of the nanowire(Supplemen- robust photovoltaic elements might indicate their potential as nano- tary Fig. 2), with and without external scattering centres, and as a scale power sources that might be integrated'on-chip' with other function of incident angle of illumination verify that the reported photocurrents and large apparent photocurrent densities arise prim- a0.18 arily from direct nanowire absorption and are not much enhanced by scattering and/or waveguiding of incident light remote from devices We note that the arge nanowire Jsc values(Fig 3c)imply substantial absorption across the solar spectrum. Such absorption is consisten with the nanocrystalline shell structure of the nanowires and previous studies of microcrystalline thin films, although the detailed nature of absorption will require further investigation. The apparent pho- tovoltaic efficiency n of this device is 3.4 + 0. 2%(upper bound)and 2.3+0.2%(lower bound), but might be improved through increased understanding of absorption and better coupling of light into the 012 devices, for example, by vertical integrationor multilayer stacking Isc and Vo depend linearly and logarithmically, respectively, on th light intensity incident on the chip ( systematic increase in photogenerated carriers. We note that the apparent efficiency is substantially higher at multiple-sun illumina tion: 4.1+0. 2% and 4.5+0.3%(upper bounds) under 3-sun and 5-sun conditions, respectively. Although this apparent efficiency enhancement is larger than that in a planar silicon solar cell, it is consistent with the larger ideality factor(N) and lower 1-sun Voc of the nanowire devices9. Analysis of a plot ofIn(Lse)versus Voc(Fig. 3d) yields values of the diode ideality factor and saturation current of 1.86 and Io=2.72 pA, respectively(see Methods). These values PV 1 are similar to those extrapolated from the dark measurements (N= 1.96, Io=3. 24 PA), and thus demonstrate good consistency in the behaviour and analysis of these core/shell silicon na diode devices In addition, the te perature dependences of Ise Voc and Fru were haracterized to understand better the behaviour of the silicon nano- wire photovoltaic devices(Fig. 3e). Isc decreases slightly with decreas- ing temperature, and can be attributed to reduced light absorption due to increasing bandgap as temperature is reduced. Voc exhibits a sub- stantial linear increase with decreasing temperature, where the slope (dvoJdTof-19 mVK is close to the value(-1.7 mVK)calcu- E lated in single crystalline silicon solar cells. The observed increase in V can be attributed to a reduced recombination rate at lower tem perature,, and yields an apparent efficiency of 6. 6%(upper bound) at 80 K (0.6-sun). The Fnm also increases with decreasing temperature as expected from the negative d vocdD)". Taken together, these Va and Fru results indicate that the silicon nanowire photovoltaic performance at room temperature (298 K in our experiments)can be significantly improved by reducing recombination processes, for Figure 4 Self-powered nanosystems. a, Real-time detection of the voltag example, by improving the crystalline structure of the shells and/or drop across an aminopropyltriethoxysilane- modified silicon nanowire at passivating the nanowire surface and grain boundaries923. different pH values. The silicon nanowire pH sensor is powered by a single Our core/shell silicon nanowire results can be compared to nano- silicon nanowire photovoltaic device operating under 8-sun illumination al-based and nanorod-based 6 photovoltaic devices. The best (Voc=0.34V,Isc=8.75 nA). Inset, circuit schematics. b, Light l-vo silicon nanowire device exhibits large apparent short-circuit current (1-sun, AM15G)of two silicon nanowire photovoltaic devices(PV 1 an densities--23.9 mAcm(upper bound) and 16.0 mAcm(lower PV 2)individually and connected in series and in parallel. c, Nanowire AND logic gate powered by two silicon nanowire photovoltaic devices in ser bound)with upper limits that are comparable to the 24.4 mA cm" Insets, circuit schematics and truth table for the AND gate. The resistance of value for the best thin film nanocrystalline silicon solar cell, and Case nanowire is -5GQ; the Voc of two photovoltaic devices in series is ubstantially better than values reported for CdSe nanorod/poly-3- 0.53V. The large resistance of the Cdse nanowire and reverse-biased p-i-n hexathiophene and dye-sensitized Zno nanorods. solar cells. The diode makes Ve and Vi(HIGH)very close to Voc of the photovoltaic device Voc value, 0. 260V, is 2-2.8 times lower than reported in these previous To get Vi(LoW), the diode is simply grounded. 888 E2007 Nature Publishing Group
The apparent short-circuit current density Jsc calculated using the projected area of the core/shell nanowire structure was 23.9 6 1.2 mA cm–2 (upper bound, excluding metal covered and exposed p-core areas) and 16.0 6 0.8 mA cm–2 (lower bound, including metal-covered and exposed p-core areas) for the device in Fig. 3a. The use of projected area to estimate the apparent current density is consistent with the methodology used with other nanostructured photovoltaic devices3–6 and our use of devices as nanoscale power sources (see below, Fig. 4). Control experiments were also carried out to investigate the principal area of light absorption by devices. For example, measurements made on devices with and without lithographic masks that block illumination of the nanowire (Supplementary Fig. 2), with and without external scattering centres, and as a function of incident angle of illumination verify that the reported photocurrents and large apparent photocurrent densities arise primarily from direct nanowire absorption and are not much enhanced by scattering and/or waveguiding of incident light remote from devices. We note that the large nanowire Jsc values (Fig. 3c) imply substantial absorption across the solar spectrum. Such absorption is consistent with the nanocrystalline shell structure of the nanowires and previous studies of microcrystalline thin films18, although the detailed nature of absorption will require further investigation. The apparent photovoltaic efficiency g of this device is 3.4 6 0.2% (upper bound) and 2.3 6 0.2% (lower bound), but might be improved through increased understanding of absorption and better coupling of light into the devices, for example, by vertical integration8 or multilayer stacking20. Isc andVoc depend linearly and logarithmically, respectively, on the light intensity incident on the chip (inset, Fig. 3d), consistent with systematic increase in photogenerated carriers19,21. We note that the apparent efficiency is substantially higher at multiple-sun illumination: 4.1 6 0.2% and 4.5 6 0.3% (upper bounds) under 3-sun and 5-sun conditions, respectively. Although this apparent efficiency enhancement is larger than that in a planar silicon solar cell19, it is consistent with the larger ideality factor (N) and lower 1-sun Voc of the nanowire devices19. Analysis of a plot of ln(Isc) versus Voc (Fig. 3d) yields values of the diode ideality factor and saturation current of N 5 1.86 and I0 5 2.72 pA, respectively (see Methods). These values are similar to those extrapolated from the dark measurements (N 5 1.96, I0 5 3.24 pA), and thus demonstrate good consistency in the behaviour and analysis of these core/shell silicon nanowire diode devices. In addition, the temperature dependences of Isc, Voc and Ffill were characterized to understand better the behaviour of the silicon nanowire photovoltaic devices (Fig. 3e). Isc decreases slightly with decreasing temperature, and can be attributed to reduced light absorption due to increasing bandgap as temperature is reduced22. Voc exhibits a substantial linear increase with decreasing temperature, where the slope (dVoc/dT) of 21.9 mV K21 is close to the value (21.7 mV K21 ) calculated in single crystalline silicon solar cells21. The observed increase in Voc can be attributed to a reduced recombination rate at lower temperature21,22, and yields an apparent efficiency of 6.6% (upper bound) at 80 K (0.6-sun). The Ffill also increases with decreasing temperature (as expected from the negative dVoc/dT) 22. Taken together, these Voc and Ffill results indicate that the silicon nanowire photovoltaic performance at room temperature (298 K in our experiments) can be significantly improved by reducing recombination processes, for example, by improving the crystalline structure of the shells and/or passivating the nanowire surface and grain boundaries19,23. Our core/shell silicon nanowire results can be compared to nanocrystal-based4 and nanorod-based5,6 photovoltaic devices. The best silicon nanowire device exhibits large apparent short-circuit current densities—23.9 mA cm–2 (upper bound) and 16.0 mA cm–2 (lower bound)—with upper limits that are comparable to the 24.4 mA cm2 value for the best thin film nanocrystalline silicon solar cell24, and substantially better than values reported for CdSe nanorod/poly-3- hexathiophene4 and dye-sensitized ZnO nanorod5,6 solar cells. The Voc value, 0.260 V, is 2–2.8 times lower than reported in these previous studies4–6,24 and represents an area that should be addressed in future studies. However, the overall apparent efficiency of the p-i-n coaxial silicon nanowire photovoltaic elements—3.4% (upper bound) and 2.3% (lower bound)—exceeds reported nanorod/polymer and nanorod/dye systems4–6, and could be increased substantially with improvements in Voc by means of, for example, surface passivation. In addition, increasing the illumination intensity can yield stable improvements in the apparent efficiency of our p-i-n coaxial silicon nanowire photovoltaic elements in contrast to other nanostructured solar cells, which often exhibit degradation4–6. The ability of individual core/shell silicon nanowires to function as robust photovoltaic elements might indicate their potential as nanoscale power sources that might be integrated ‘on-chip’ with other Vc Vo Vi1 Vi2 Vi1 Vi2 Vo 0 0 0 1 0 0 0 1 0 1 1 1 0.0 0.2 0.4 0.6 Vout (V) 0 0 1 0 0 1 1 1 Logic state c 0 2,000 4,000 6,000 0.12 0.14 0.16 0.18 6 6 7 7 7 7 7 8 8 V (V) Time (s) a b 0.0 0.2 0.4 –3 –2 –1 0 PV 1 PV 2 In series In parallel I (nA) Vbias (V) + – Nanowire sensor V Figure 4 | Self-powered nanosystems. a, Real-time detection of the voltage drop across an aminopropyltriethoxysilane-modified silicon nanowire at different pH values. The silicon nanowire pH sensor is powered by a single silicon nanowire photovoltaic device operating under 8-sun illumination (Voc 5 0.34 V, Isc 5 8.75 nA). Inset, circuit schematics. b, Light I–V curves (1-sun, AM 1.5G) of two silicon nanowire photovoltaic devices (PV 1 and PV 2) individually and connected in series and in parallel. c, Nanowire AND logic gate powered by two silicon nanowire photovoltaic devices in series. Insets, circuit schematics and truth table for the AND gate. The resistance of CdSe nanowire is ,5 GV; the Voc of two photovoltaic devices in series is 0.53 V. The large resistance of the CdSe nanowire and reverse-biased p-i-n diode makes Vc and Vi (HIGH) very close to Voc of the photovoltaic device. To get Vi (LOW), the diode is simply grounded. LETTERS NATURE|Vol 449| 18 October 2007 888 ©2007 NaturePublishingGroup
NATURE Vol 449 18 October 20 LETTERS semiconductor nanowire- and carbon-nanotube-based nanoelectro- 2. Le nic elements, given that these elements require power as low as a few Report of the Basic Energy Sciences Workshop on Solar Energy Utilization, US anowatts"-.Recent work addressing this key issue has involved the use of piezoelectric ZnO nanowires for mechanical-to-electrical con- 3. Gratzel, M Photoelectrochemical cells. Nature 414, 338-344(2001) version,although the direct current(d. c )power developed by this 4.Huynh, W.U. Dittmer, J1&Alivisatos, A P Hybrid nanorod-polymer solar cell nanogenerator., 1-4 fw per nanowire, is at present less than is ence295,2425-2427(2002) needed to drive nanoelectronic devices. Silicon nanowire photovol- 5. Law, M. Greene LIE Johnson, .C, Saykally R, Yang, P Nanowire dye. taic elements can produce 50-200 pW per nanowire at I-sun illu- 6. Baxter, J.B. Aydil, E S Nanowire-based dye-sensitized solar cells. Appl. Phys. mination, and thus could function as nanoscale power supplies fo ett86,053114(2005) nanoelectronics by either increasing the Marti, A. Nozik, A J. Solar cells based on quantum dots: several coupled elements. For example, a single silicon nanowire ultiple exciton generation and intermediate bands. MRS Bull. 32, 236-241 photovoltaic device, operating under 8-sun illumination (P 1.86nW, 1=4.8%)was used to drive a silicon nanowire pH sensor ayes, B M, Atwater, H. A. Lewis, N S Comparison of the device physics principles of planar and radial p-n junction nanorod solar cells. J. Appl. Phys. 97. without additional power(Fig. 4a). Measurements of the voltage 114302(2005) drop across the p-type silicon nanowire sensor(powered solely by 9. Zhang Y, Wang, L W& Mascarenhas, A Quantum coaxial cables. Nano Lett. 7. the silicon nanowire photovoltaic element) as a function of time 1264-1269(2007) (Fig. 4a)show reversible increase (or decrease)in voltage as the 10. Gust, D, Moore, T. A. Moore, A. L Mimicking photosynthetic solar energy lution pH is decreased (or increased)that are consistent with the ll. Klauk, H Zschieschang U, Pflaum, I& Halik, M Ultralow-power organic expected changes in resistance of the silicon nanowire with surface complementary circuits. Nature 445, 745-748(2007) charge2. In addition, we note that the photovoltaic(under constant 12. Browne, W.R. Feringa, B L Making molecular machines work.Nature 8-sun illumination) and sensor devices both exhibited excellent lanotechnol. 1, 25-35(2006) stability over the approximately two-hour time of experiments 13. Avouris, P& Chen, J Nanotube electronics and optoelectronics. Mater. Today 9 Last, the core/shell silicon nanowire photovoltaic devices were 14. Wagner, R.S.& Ellis, W.C. Vapor-liquid-solid mechanism of single crystal interconnected in series and in parallel to demonstrate scaling of growth. Appl. Phys. Lett. 4, 89(1964 he output characteristics and to drive larger loads. F-Vdata recorded 15. Zheng, G.F. Lu, W, Jin, S& Lieber, C.M. Synthesis and fabrication of high- from two illuminated silicon nanowire ance n-type silicon nanowire transistors. Adv Mater. 16, 1890-1893 eral important features. First, the individual elements exhibit very 16. Hayden, o. Agarwal. R. Lieber. C M Nanoscale avalanche photodiodes for similar behaviour, highlighting the good reproducibility of our core/ shell nanowire devices. Second, interconnection of the two elements in series and parallel yields Vo and Ise values, respectively, that are 17. Karpov, VG, Cooray, M.L.C.& Shvydka, D Physics of ultrathin photovoltaics. approximately the sum of two, as expected. Notably, we have used l. Phys. Lett89,163518(2006 terconnected silicon nanowire photovoltaic elements as the sole 18. Shah, A V et al. Thin-film silicon solar cell technology. Prog. Photovolt Res Appl 12.113-142(2004) power supply driving a nanowire-based AND logic gate(Fig 4 19. Luque, A& Hegedus, S. Handbook of Photovoltaic Science and Engineering(Wiley, where Ve and the voltage inputs 1 and 2 Vil(HIGH)and Viz (HIGH)are provided by two nanowire photovoltaic devices in series 20. Javey, A, Nam, S. Friedman, R. Yan, H. Lieber, CM. Layer-by-layer assembly at 2-sun illumination(HIGH is the input state and Vil (HIGH) Viz(HIGH)are close to Voc of the PV devices. )A summary of the 773-777(2007) el, P. Physics of Solar Cells, From Principles to New Concepts(Wiley-VCH, input/output results(right inset, Fig. 4c) shows correct AND logic. This work thus demonstrates the potential for self-powered nano- 22. Green, M. A General temperature dependence of solar cell performanc wire-based logic circuits and, more generally, the possibility of self- and implications for device modeling. Prog. Photovolt Res. App powered functional nanoelectronic systems through, for example, 23. Aberle, A. G. Surface passivation of crystalline silicon solar cells: a review. Prog. Photovolt Res. Appl. 8, 4 lements with nanoelectronic, photonic and biological sensing devices. 24. Green, MA, Emery, K, King, D L, Hishikawa, Y. Warta, W Solar cell efficiency rsion 29). Photovolt Res. Appl. 15, 35-40(200 METHODS SUMMARY 25. Cui, Y, Wei, QQ, Park, H. K. Lieber, C M. Nanowire nanoser Single-crystalline silicon nanowire p-cores were synthesized by means of a sensitive and selective detection of biological and chemical speci nanocluster-catalysed Vis method" and then chemical vapour deposition 26. Huang, Y et al. Logic gates and computation from assembled nanowire building growth to inhibit axial elongation of the silicon nanowire After transistors. Science 294, 1317-1320(2001) growth, SiO2 was deposited conformally by means of plasma-enhanced chemical 28. Wang,ZL& vapour deposition(PECVD). Standard electron beam lithography, silicon we chemical etching(KOH etchant)and thermal evaporation were used to make 29. Wang, X, Song, J, Liu, J& Wang, Z L Direct-current nanogenerator driven by coaxial nanowire devices, with selective contacts on the p-core and n-shell.A ultrasonic waves. Science 316, 102-105 (2007) standard solar simulator(150 W, Newport Stratford) with an AM 1. 5G filter supplementary Information is linked to the online version of the paper at asusedtocharacterizethephotovoltaicdeviceresponsewheretheaveragewww.nature.com/nature. tensity was calibrated using a power meter. For multiple-sun illumination, an aspheric lens was placed between the light source and nanowire devices. All elec- Acknowledgements We thank D W.Pang, D.C.Bell, H.G.Park,HS.Choe, HYan and For self-powered pH sensing and aND logic gate experiments, a computer. support from the MITRE Corporation and the Air Force office of Scientific ontrolled analogue-to-digital converter(6030E, National Instruments)was used to record the voltage drop or voltage output of the silicon nanowire devices. Author Contributions CML, B T X.Z. and TJ. K designed the experiments. B.T. X.Z., T.J. K, Y F N Y and G.Y. performed experiments and analyses. C.M. L B T. Full Methods and any associated references are available in the online on of X.Z. and T.J. K wrote the paper. All authors discussed the results and commented n the manuscript. Received 15 May; accepted 7 August 2007. Author Information Reprints and permissions information is available at www.nature.com/reprints.Correspondenceandrequestsformaterialsshouldbe 1. Lewis, N S Toward cost-effective solar energy use. Science 315, 798-801(2007). add to CM.L(cmlacmliri 8s9 E2007 Nature Publishing Group
semiconductor nanowire- and carbon-nanotube-based nanoelectronic elements, given that these elements require power as low as a few nanowatts25–27. Recent work addressing this key issue has involved the use of piezoelectric ZnO nanowires for mechanical-to-electrical conversion, although the direct current (d.c.) power developed by this nanogenerator28,29, 1–4 fW per nanowire, is at present less than is needed to drive nanoelectronic devices. Silicon nanowire photovoltaic elements can produce 50–200 pW per nanowire at 1-sun illumination, and thus could function as nanoscale power supplies for nanoelectronics by either increasing the light intensity or using several coupled elements. For example, a single silicon nanowire photovoltaic device, operating under 8-sun illumination (Pmax 5 1.86 nW, g 5 4.8%) was used to drive a silicon nanowire pH sensor25 without additional power (Fig. 4a). Measurements of the voltage drop across the p-type silicon nanowire sensor (powered solely by the silicon nanowire photovoltaic element) as a function of time (Fig. 4a) show reversible increase (or decrease) in voltage as the solution pH is decreased (or increased) that are consistent with the expected changes in resistance of the silicon nanowire with surface charge25. In addition, we note that the photovoltaic (under constant 8-sun illumination) and sensor devices both exhibited excellent stability over the approximately two-hour time of experiments. Last, the core/shell silicon nanowire photovoltaic devices were interconnected in series and in parallel to demonstrate scaling of the output characteristics and to drive larger loads. I–V data recorded from two illuminated silicon nanowire elements (Fig. 4b) show several important features. First, the individual elements exhibit very similar behaviour, highlighting the good reproducibility of our core/ shell nanowire devices. Second, interconnection of the two elements in series and parallel yields Voc and Isc values, respectively, that are approximately the sum of two, as expected. Notably, we have used interconnected silicon nanowire photovoltaic elements as the sole power supply driving a nanowire-based AND logic gate (Fig. 4c), where Vc and the voltage inputs 1 and 2 Vi1 (HIGH) and Vi2 (HIGH) are provided by two nanowire photovoltaic devices in series at 2-sun illumination. (HIGH is the input state and Vi1 (HIGH) and Vi2 (HIGH) are close to Voc of the PV devices.) A summary of the input/output results (right inset, Fig. 4c) shows correct AND logic. This work thus demonstrates the potential for self-powered nanowire-based logic circuits and, more generally, the possibility of selfpowered functional nanoelectronic systems through, for example, the integration of multiple stacked silicon nanowire photovoltaic elements with nanoelectronic, photonic and biological sensing devices. METHODS SUMMARY Single-crystalline silicon nanowire p-cores were synthesized by means of a nanocluster-catalysed VLS method14,15, and then chemical vapour deposition was used to deposit i- and n-type nanocrystalline silicon shells; shell growth was carried out at higher temperature and lower pressure than those used in core growth to inhibit axial elongation of the silicon nanowire core. After nanowire growth, SiO2 was deposited conformally by means of plasma-enhanced chemical vapour deposition (PECVD). Standard electron beam lithography, silicon wet chemical etching (KOH etchant) and thermal evaporation were used to make coaxial nanowire devices, with selective contacts on the p-core and n-shell. A standard solar simulator (150 W, Newport Stratford) with an AM 1.5G filter was used to characterize the photovoltaic device response, where the average intensity was calibrated using a power meter. For multiple-sun illumination, an aspheric lens was placed between the light source and nanowire devices. All electrical measurements were made with a probe station (TTP-4, Desert Cryogenics). For self-powered pH sensing and AND logic gate experiments, a computercontrolled analogue-to-digital converter (6030E, National Instruments) was used to record the voltage drop or voltage output of the silicon nanowire devices. Full Methods and any associated references are available in the online version of the paper at www.nature.com/nature. Received 15 May; accepted 7 August 2007. 1. Lewis, N. S. Toward cost-effective solar energy use. Science 315, 798–801 (2007). 2. Lewis, N. S. & Crabtree, G. (eds) Basic Research Needs for Solar Energy Utilization. (Report of the Basic Energy Sciences Workshop on Solar Energy Utilization, US Department of Energy, Washington DC, 2005); ,http://www.er.doe.gov/bes/ reports/abstracts.html#SEU. (18–21 April, 2005). 3. Gratzel, M. Photoelectrochemical cells. Nature 414, 338–344 (2001). 4. Huynh, W. U., Dittmer, J. J. & Alivisatos, A. P. Hybrid nanorod-polymer solar cells. Science 295, 2425–2427 (2002). 5. Law, M., Greene, L. E., Johnson, J. C., Saykally, R. & Yang, P. Nanowire dyesensitized solar cells. Nature Mater. 4, 455–459 (2005). 6. Baxter, J. B. & Aydil, E. S. Nanowire-based dye-sensitized solar cells. Appl. Phys. Lett. 86, 053114 (2005). 7. Luque, A., Marti, A. & Nozik, A. J. Solar cells based on quantum dots: multiple exciton generation and intermediate bands. MRS Bull. 32, 236–241 (2007). 8. Kayes, B. M., Atwater, H. A. & Lewis, N. S. Comparison of the device physics principles of planar and radial p-n junction nanorod solar cells. J. Appl. Phys. 97, 114302 (2005). 9. Zhang, Y., Wang, L. W. & Mascarenhas, A. Quantum coaxial cables. Nano Lett. 7, 1264–1269 (2007). 10. Gust, D., Moore, T. A. & Moore, A. L. Mimicking photosynthetic solar energy transduction. Acc. Chem. Res. 34, 40–48 (2001). 11. Klauk, H., Zschieschang, U., Pflaum, J. & Halik, M. Ultralow-power organic complementary circuits. Nature 445, 745–748 (2007). 12. Browne, W. R. & Feringa, B. L. Making molecular machines work. Nature Nanotechnol. 1, 25–35 (2006). 13. Avouris, P. & Chen, J. Nanotube electronics and optoelectronics. Mater. Today 9, 46–54 (2006). 14. Wagner, R. S. & Ellis, W. C. Vapor–liquid–solid mechanism of single crystal growth. Appl. Phys. Lett. 4, 89 (1964). 15. Zheng, G. F., Lu, W., Jin, S. & Lieber, C. M. Synthesis and fabrication of highperformance n-type silicon nanowire transistors. Adv. Mater. 16, 1890–1893 (2004). 16. Hayden, O., Agarwal, R. & Lieber, C. M. Nanoscale avalanche photodiodes for highly sensitive and spatially resolved photon detection. Nature Mater. 5, 352–356 (2006). 17. Karpov, V. G., Cooray, M. L. C. & Shvydka, D. Physics of ultrathin photovoltaics. Appl. Phys. Lett. 89, 163518 (2006). 18. Shah, A. V. et al. Thin-film silicon solar cell technology. Prog. Photovolt. Res. Appl. 12, 113–142 (2004). 19. Luque, A. & Hegedus, S. Handbook of Photovoltaic Science and Engineering (Wiley, Chichester, 2003). 20. Javey, A., Nam, S., Friedman, R. S., Yan, H. & Lieber, C. M. Layer-by-layer assembly of nanowires for three-dimensional, multifunctional electronics. Nano Lett. 7, 773–777 (2007). 21. Wu¨rfel, P. Physics of Solar Cells, From Principles to New Concepts (Wiley-VCH, Weinheim, 2005). 22. Green, M. A. General temperature dependence of solar cell performance and implications for device modeling. Prog. Photovolt. Res. Appl. 11, 333–340 (2003). 23. Aberle, A. G. Surface passivation of crystalline silicon solar cells: a review. Prog. Photovolt. Res. Appl. 8, 473–487 (2000). 24. Green, M. A., Emery, K., King, D. L., Hishikawa, Y. & Warta, W. Solar cell efficiency tables (version 29). Photovolt. Res. Appl. 15, 35–40 (2007). 25. Cui, Y., Wei, Q. Q., Park, H. K. & Lieber, C. M. Nanowire nanosensors for highly sensitive and selective detection of biological and chemical species. Science 293, 1289–1292 (2001). 26. Huang, Y. et al. Logic gates and computation from assembled nanowire building blocks. Science 294, 1313–1317 (2001). 27. Bachtold, A., Hadley, P., Nakanishi, T. & Dekker, C. Logic circuits with carbon nanotube transistors. Science 294, 1317–1320 (2001). 28. Wang, Z. L. & Song, J. Piezoelectric nanogenerators based on zinc oxide nanowire arrays. Science 312, 242–246 (2006). 29. Wang, X., Song, J., Liu, J. & Wang, Z. L. Direct-current nanogenerator driven by ultrasonic waves. Science 316, 102–105 (2007). Supplementary Information is linked to the online version of the paper at www.nature.com/nature. Acknowledgements We thank D. W. Pang, D. C. Bell, H. G. Park, H. S. Choe, H. Yan and P. Xie for help with experiment and data analysis. C.M.L. acknowledges support from the MITRE Corporation and the Air Force Office of Scientific Research, and T.J.K. acknowledges an NSF graduate fellowship. Author Contributions C.M.L., B.T., X.Z. and T.J.K. designed the experiments. B.T., X.Z., T.J.K., Y.F., N.Y. and G.Y. performed experiments and analyses. C.M.L., B.T., X.Z. and T.J.K. wrote the paper. All authors discussed the results and commented on the manuscript. Author Information Reprints and permissions information is available at www.nature.com/reprints. Correspondence and requests for materials should be addressed to C.M.L. (cml@cmliris.harvard.edu). NATURE| Vol 449|18 October 2007 LETTERS 889 ©2007 NaturePublishingGroup
doi:10.1038/ nature06181 nature METHODS I-V data analysis. The saturation current, Io, together with the diode ideality Nanowire synthesis p-i-n coaxial silicon nanowires were prepared using 100- factor N was extrapolated from the dark k-v curve using the ideal diode gold nanoclusters as catalysts, silaneSiH,)as the silicon reactant, diboron equate (B2H6, 100 p.P. m in H2)as the p-type dopant, phosphine(PH,, 1,000 p-p.min H2) as the n-type dopant, and hydrogen(H2) as the carrier gas. For the p-core In(D=NT V+In( nanowire growth, the flow rates of SiHa, B2H and Hz were 1, 10 and 60 standard where g is the electronic charge and k is the Boltzmann constant.The respectively. For the i-shell deposition, the flow rates of SiH and H2 were 0.15 coaxial silicon nanowire were 2.23+0.13 and 4.70+0.77, respectively. Under and 60 standard cubic centimetres per minute, respectively, and 0.75 standard cubic centimetres per minute of PH, was added during the subsequent n-shell illumination, the ideal diode equation can b expressed in terms of Isc and Vocas: deposition. The growth temperatures for core and shells were 440C and 650C, respectively; the total pressures were 40 torr and 25 torr, respectively. The p-core NkT growth lasted 3 h, and the deposition of i- and n- shells took I h and 0.5 h, where fits to In(Lsc)versus Voc (for example, Fig 3d) are used to determine Nand respectively. Following the growth, the nanowire growth substrate was cleaned lo from the slope and intercept, respectively by oxygen plasma and the SiOz hard mask(30-60-nm thick) was deposited Silicon nanowire photovoltaic-powered nanowire sensor and logic devices. Device fabrication. All p-i-n devices were fabricated on heavily doped silicon (Fig. 4a) were fabricated as described sd cthanol/; 0(9596/596), and a single <0.005 2 cm, Nova Electronic Materials). To fix the nanowires, chro- polydimethylsiloxane microfluidic channel was used to deliver different pH pads were patterned by electron beam lithography(EBL) and deposited solutions during the experiments The silicon nanowire sensor resistance on the SiOz hard mask by thermal evaporation. The second EBL step (10-30MQ2)was chosen to allow for operation in the high-power working defined an etching window to expose the p-core in selected regions. The SiOz at regime of the photovoltaic device in which the output voltage ranges from the exposed nanowire region was first etched away using buffered HF with one-third to one-half of Vo but the output current is relatively constant.The the e-beam resist as an etching mask, and the underlying shells of the silicon p-contact of the silicon nanowire photovoltaic device was connected to one end nanowire were further removed by KOH etching(70C, 45s). In the last step, of the sensor device, whereas the n-contact and the other end of the sensor device titanium/palladium contacts (3 nm/500 nm thick) at the p-core n-shell of were grounded, and a computer-controlled analogue-to-digital converter dividual silicon nanowires were patterned by EBL and deposited by thermal (6030E, National Instruments)was used to record the voltage drop across the evaporation. No annealing was required to ensure ohmic contact formation. silicon nanowire sensor. The self-powered AND gate( Fig. 4c)was made entire Sample illumination. A standard solar simulator(150W, Newport Stratford) from nanowires, in which p-i-n coaxial silicon nanowires were configured as the with an AM 1. 5G filter was used in our experiments, in which the average inten- two diodes and a CdSe nanowire was used as the resistor. The large resistance of sity was calibrated using a lens was placed between t the Case nanowire and reverse-biased p-i-n diodes yielded V and Vi (HIGH) t source and the nanowire photovoltaic values close to the V (0.53v) of the photovoltaic device( two p-i-n coaxial device. It should be noted that the exact light intensity incident on the nanowire silicon nanowire elements in series). Voltage outputs for all logic gate devices cannot be measured exactly because its physical dimensions(around 300 nm in were recorded using a computer-controlled analogue-to-digital converter. diameter and 3-22 um in length)are orders of magnitude smaller than those of the pin hole of a power meter(millimetre range ). Nevertheless, the intensity 30. Patolsky F, Zheng, G F& Lieber, C M Fabrication of silicon nanowire devices for should be fairly close to l-sun according to the light intensity uniformity gua- ranted by the solar simulator vendor. Nature protocols11711-1724;doi:10.1038/ prot2006227(2006) E2007 Nature Publishing Group
METHODS Nanowire synthesis. p-i-n coaxial silicon nanowires were prepared using 100- nm gold nanoclusters as catalysts, silane (SiH4) as the silicon reactant, diboron (B2H6, 100 p.p.m. in H2) as the p-type dopant, phosphine (PH3, 1,000 p.p.m. in H2) as the n-type dopant, and hydrogen (H2) as the carrier gas. For the p-core nanowire growth, the flow rates of SiH4, B2H6 and H2 were 1, 10 and 60 standard (converted to standard temperature and pressure) cubic centimetres per minute, respectively. For the i-shell deposition, the flow rates of SiH4 and H2 were 0.15 and 60 standard cubic centimetres per minute, respectively, and 0.75 standard cubic centimetres per minute of PH3 was added during the subsequent n-shell deposition. The growth temperatures for core and shells were 440 uC and 650 uC, respectively; the total pressures were 40 torr and 25 torr, respectively. The p-core growth lasted 3 h, and the deposition of i- and n- shells took 1 h and 0.5 h, respectively. Following the growth, the nanowire growth substrate was cleaned by oxygen plasma and the SiO2 hard mask (30–60-nm thick) was deposited conformally onto the silicon nanowire surface by means of PECVD. Device fabrication. All p-i-n devices were fabricated on heavily doped silicon substrates with 100 nm thermal oxide and 200 nm silicon nitride (n-type, resistivity ,0.005 V cm, Nova Electronic Materials). To fix the nanowires, chromium pads were patterned by electron beam lithography (EBL) and deposited directly on the SiO2 hard mask by thermal evaporation. The second EBL step defined an etching window to expose the p-core in selected regions. The SiO2 at the exposed nanowire region was first etched away using buffered HF with the e-beam resist as an etching mask, and the underlying shells of the silicon nanowire were further removed by KOH etching (70 uC, 45 s). In the last step, titanium/palladium contacts (3 nm/500 nm thick) at the p-core and n-shell of individual silicon nanowires were patterned by EBL and deposited by thermal evaporation. No annealing was required to ensure ohmic contact formation. Sample illumination. A standard solar simulator (150 W, Newport Stratford) with an AM 1.5G filter was used in our experiments, in which the average intensity was calibrated using a power meter. For multiple-sun illumination, an aspheric lens was placed between the light source and the nanowire photovoltaic device. It should be noted that the exact light intensity incident on the nanowire cannot be measured exactly because its physical dimensions (around 300 nm in diameter and 3–22 mm in length) are orders of magnitude smaller than those of the pin hole of a power meter (millimetre range). Nevertheless, the intensity should be fairly close to 1-sun according to the light intensity uniformity guaranteed by the solar simulator vendor. I–V data analysis. The saturation current, I0, together with the diode ideality factor N was extrapolated from the dark I–V curve using the ideal diode equation: ln(I)~ q NkT Vzln(I0) where q is the electronic charge and k is the Boltzmann constant. The average 6 1s ideality factor values obtained from the analysis of p-i-n and p-n coaxial silicon nanowire were 2.23 6 0.13 and 4.70 6 0.77, respectively. Under illumination, the ideal diode equation can be expressed in terms of Isc and Voc as: ln(Isc)~ q NkT Voczln(I0) where fits to ln(Isc) versus Voc (for example, Fig. 3d) are used to determine N and I0 from the slope and intercept, respectively. Silicon nanowire photovoltaic-powered nanowire sensor and logic devices. p-type silicon nanowire (diameter, 20 nm; Si:B 5 16,000:1) sensor devices (Fig. 4a) were fabricated as described elsewhere30. The sensor devices were modified with aminopropyltriethoxysilane in ethanol/H2O (95%/5%), and a single polydimethylsiloxane microfluidic channel was used to deliver different pH solutions during the experiments30. The silicon nanowire sensor resistance (10–30 MV) was chosen to allow for operation in the high-power working regime of the photovoltaic device in which the output voltage ranges from one-third to one-half of Voc but the output current is relatively constant. The p-contact of the silicon nanowire photovoltaic device was connected to one end of the sensor device, whereas the n-contact and the other end of the sensor device were grounded, and a computer-controlled analogue-to-digital converter (6030E, National Instruments) was used to record the voltage drop across the silicon nanowire sensor. The self-powered AND gate (Fig. 4c) was made entirely from nanowires, in which p-i-n coaxial silicon nanowires were configured as the two diodes and a CdSe nanowire was used as the resistor. The large resistance of the CdSe nanowire and reverse-biased p-i-n diodes yielded Vc and Vi (HIGH) values close to the Voc (0.53 V) of the photovoltaic device (two p-i-n coaxial silicon nanowire elements in series). Voltage outputs for all logic gate devices were recorded using a computer-controlled analogue-to-digital converter. 30. Patolsky, F., Zheng, G. F. & Lieber, C. M. Fabrication of silicon nanowire devices for ultrasensitive, label-free, real-time detection of biological and chemical species. Nature Protocols 1, 1711–1724; doi:10.1038/nprot.2006.227 (2006). doi:10.1038/nature06181 ©2007 NaturePublishingGroup
